xref: /OK3568_Linux_fs/u-boot/cmd/fpgad.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2013
3*4882a593Smuzhiyun  * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * based on cmd_mem.c
6*4882a593Smuzhiyun  * (C) Copyright 2000
7*4882a593Smuzhiyun  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <common.h>
13*4882a593Smuzhiyun #include <command.h>
14*4882a593Smuzhiyun #include <console.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <gdsys_fpga.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun static uint	dp_last_fpga;
19*4882a593Smuzhiyun static uint	dp_last_addr;
20*4882a593Smuzhiyun static uint	dp_last_length = 0x40;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun  * FPGA Memory Display
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * Syntax:
26*4882a593Smuzhiyun  *	fpgad {fpga} {addr} {len}
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun #define DISP_LINE_LEN	16
do_fpga_md(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])29*4882a593Smuzhiyun int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	unsigned int k;
32*4882a593Smuzhiyun 	unsigned int fpga;
33*4882a593Smuzhiyun 	ulong	addr, length;
34*4882a593Smuzhiyun 	int rc = 0;
35*4882a593Smuzhiyun 	u16 linebuf[DISP_LINE_LEN/sizeof(u16)];
36*4882a593Smuzhiyun 	ulong nbytes;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	/*
39*4882a593Smuzhiyun 	 * We use the last specified parameters, unless new ones are
40*4882a593Smuzhiyun 	 * entered.
41*4882a593Smuzhiyun 	 */
42*4882a593Smuzhiyun 	fpga = dp_last_fpga;
43*4882a593Smuzhiyun 	addr = dp_last_addr;
44*4882a593Smuzhiyun 	length = dp_last_length;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	if (argc < 3)
47*4882a593Smuzhiyun 		return CMD_RET_USAGE;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	if ((flag & CMD_FLAG_REPEAT) == 0) {
50*4882a593Smuzhiyun 		/*
51*4882a593Smuzhiyun 		 * FPGA is specified since argc > 2
52*4882a593Smuzhiyun 		 */
53*4882a593Smuzhiyun 		fpga = simple_strtoul(argv[1], NULL, 16);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 		/*
56*4882a593Smuzhiyun 		 * Address is specified since argc > 2
57*4882a593Smuzhiyun 		 */
58*4882a593Smuzhiyun 		addr = simple_strtoul(argv[2], NULL, 16);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 		/*
61*4882a593Smuzhiyun 		 * If another parameter, it is the length to display.
62*4882a593Smuzhiyun 		 * Length is the number of objects, not number of bytes.
63*4882a593Smuzhiyun 		 */
64*4882a593Smuzhiyun 		if (argc > 3)
65*4882a593Smuzhiyun 			length = simple_strtoul(argv[3], NULL, 16);
66*4882a593Smuzhiyun 	}
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	nbytes = length * sizeof(u16);
69*4882a593Smuzhiyun 	do {
70*4882a593Smuzhiyun 		ulong linebytes = (nbytes > DISP_LINE_LEN) ?
71*4882a593Smuzhiyun 				  DISP_LINE_LEN : nbytes;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 		for (k = 0; k < linebytes / sizeof(u16); ++k)
74*4882a593Smuzhiyun 			fpga_get_reg(fpga,
75*4882a593Smuzhiyun 				     (u16 *)fpga_ptr[fpga] + addr
76*4882a593Smuzhiyun 				     / sizeof(u16) + k,
77*4882a593Smuzhiyun 				     addr + k * sizeof(u16),
78*4882a593Smuzhiyun 				     &linebuf[k]);
79*4882a593Smuzhiyun 		print_buffer(addr, (void *)linebuf, sizeof(u16),
80*4882a593Smuzhiyun 			     linebytes / sizeof(u16),
81*4882a593Smuzhiyun 			     DISP_LINE_LEN / sizeof(u16));
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 		nbytes -= linebytes;
84*4882a593Smuzhiyun 		addr += linebytes;
85*4882a593Smuzhiyun 		if (ctrlc()) {
86*4882a593Smuzhiyun 			rc = 1;
87*4882a593Smuzhiyun 			break;
88*4882a593Smuzhiyun 		}
89*4882a593Smuzhiyun 	} while (nbytes > 0);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	dp_last_fpga = fpga;
92*4882a593Smuzhiyun 	dp_last_addr = addr;
93*4882a593Smuzhiyun 	dp_last_length = length;
94*4882a593Smuzhiyun 	return rc;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun U_BOOT_CMD(
98*4882a593Smuzhiyun 	fpgad,	4,	1,	do_fpga_md,
99*4882a593Smuzhiyun 	"fpga register display",
100*4882a593Smuzhiyun 	"fpga address [# of objects]"
101*4882a593Smuzhiyun );
102