1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2000
3*4882a593Smuzhiyun * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun * Cache support: switch on or off, get status
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <command.h>
13*4882a593Smuzhiyun #include <linux/compiler.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun static int parse_argv(const char *);
16*4882a593Smuzhiyun
invalidate_icache_all(void)17*4882a593Smuzhiyun void __weak invalidate_icache_all(void)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun /* please define arch specific invalidate_icache_all */
20*4882a593Smuzhiyun puts("No arch specific invalidate_icache_all available!\n");
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
do_icache(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])23*4882a593Smuzhiyun static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun switch (argc) {
26*4882a593Smuzhiyun case 2: /* on / off */
27*4882a593Smuzhiyun switch (parse_argv(argv[1])) {
28*4882a593Smuzhiyun case 0:
29*4882a593Smuzhiyun icache_disable();
30*4882a593Smuzhiyun break;
31*4882a593Smuzhiyun case 1:
32*4882a593Smuzhiyun icache_enable();
33*4882a593Smuzhiyun break;
34*4882a593Smuzhiyun case 2:
35*4882a593Smuzhiyun invalidate_icache_all();
36*4882a593Smuzhiyun break;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun break;
39*4882a593Smuzhiyun case 1: /* get status */
40*4882a593Smuzhiyun printf("Instruction Cache is %s\n",
41*4882a593Smuzhiyun icache_status() ? "ON" : "OFF");
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun default:
44*4882a593Smuzhiyun return CMD_RET_USAGE;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun return 0;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
flush_dcache_all(void)49*4882a593Smuzhiyun void __weak flush_dcache_all(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun puts("No arch specific flush_dcache_all available!\n");
52*4882a593Smuzhiyun /* please define arch specific flush_dcache_all */
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
do_dcache(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])55*4882a593Smuzhiyun static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun ulong start, size;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun switch (argc) {
60*4882a593Smuzhiyun case 4:
61*4882a593Smuzhiyun start = simple_strtoul(argv[2], NULL, 16);
62*4882a593Smuzhiyun size = simple_strtoul(argv[3], NULL, 16);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun switch (parse_argv(argv[1])) {
65*4882a593Smuzhiyun case 2:
66*4882a593Smuzhiyun printf("flush dcache: 0x%08lx - 0x%08lx\n", start, start + size);
67*4882a593Smuzhiyun flush_dcache_range(start, start + size);
68*4882a593Smuzhiyun break;
69*4882a593Smuzhiyun case 3:
70*4882a593Smuzhiyun printf("invalidate dcache: 0x%08lx - 0x%08lx\n", start, start + size);
71*4882a593Smuzhiyun invalidate_dcache_range(start, start + size);
72*4882a593Smuzhiyun break;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun case 2: /* on / off */
76*4882a593Smuzhiyun switch (parse_argv(argv[1])) {
77*4882a593Smuzhiyun case 0:
78*4882a593Smuzhiyun dcache_disable();
79*4882a593Smuzhiyun break;
80*4882a593Smuzhiyun case 1:
81*4882a593Smuzhiyun dcache_enable();
82*4882a593Smuzhiyun break;
83*4882a593Smuzhiyun case 2:
84*4882a593Smuzhiyun flush_dcache_all();
85*4882a593Smuzhiyun break;
86*4882a593Smuzhiyun case 3:
87*4882a593Smuzhiyun printf("error: dcache invalidate require [start] [size]\n");
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun break;
91*4882a593Smuzhiyun case 1: /* get status */
92*4882a593Smuzhiyun printf("Data (writethrough) Cache is %s\n",
93*4882a593Smuzhiyun dcache_status() ? "ON" : "OFF");
94*4882a593Smuzhiyun return 0;
95*4882a593Smuzhiyun default:
96*4882a593Smuzhiyun return CMD_RET_USAGE;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
parse_argv(const char * s)101*4882a593Smuzhiyun static int parse_argv(const char *s)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun if (strcmp(s, "invalidate") == 0)
104*4882a593Smuzhiyun return 3;
105*4882a593Smuzhiyun else if (strcmp(s, "flush") == 0)
106*4882a593Smuzhiyun return 2;
107*4882a593Smuzhiyun else if (strcmp(s, "on") == 0)
108*4882a593Smuzhiyun return 1;
109*4882a593Smuzhiyun else if (strcmp(s, "off") == 0)
110*4882a593Smuzhiyun return 0;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return -1;
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun U_BOOT_CMD(
117*4882a593Smuzhiyun icache, 2, 1, do_icache,
118*4882a593Smuzhiyun "enable or disable instruction cache",
119*4882a593Smuzhiyun "[on, off, flush]\n"
120*4882a593Smuzhiyun " - enable, disable, or flush instruction cache"
121*4882a593Smuzhiyun );
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun U_BOOT_CMD(
124*4882a593Smuzhiyun dcache, 4, 1, do_dcache,
125*4882a593Smuzhiyun "enable or disable data cache",
126*4882a593Smuzhiyun "[on, off, flush, invalidate] [start] [size]\n"
127*4882a593Smuzhiyun " - enable, disable, or flush data (writethrough) cache"
128*4882a593Smuzhiyun );
129