1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #ifndef XIL_IO_H /* prevent circular inclusions */ 6*4882a593Smuzhiyun #define XIL_IO_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* FIXME remove this when vivado is fixed */ 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun #include <common.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define xil_printf(...) 13*4882a593Smuzhiyun Xil_ICacheEnable(void)14*4882a593Smuzhiyunvoid Xil_ICacheEnable(void) 15*4882a593Smuzhiyun {} 16*4882a593Smuzhiyun Xil_DCacheEnable(void)17*4882a593Smuzhiyunvoid Xil_DCacheEnable(void) 18*4882a593Smuzhiyun {} 19*4882a593Smuzhiyun Xil_ICacheDisable(void)20*4882a593Smuzhiyunvoid Xil_ICacheDisable(void) 21*4882a593Smuzhiyun {} 22*4882a593Smuzhiyun Xil_DCacheDisable(void)23*4882a593Smuzhiyunvoid Xil_DCacheDisable(void) 24*4882a593Smuzhiyun {} 25*4882a593Smuzhiyun Xil_Out32(unsigned long addr,unsigned long val)26*4882a593Smuzhiyunvoid Xil_Out32(unsigned long addr, unsigned long val) 27*4882a593Smuzhiyun { 28*4882a593Smuzhiyun writel(val, addr); 29*4882a593Smuzhiyun } 30*4882a593Smuzhiyun Xil_In32(unsigned long addr)31*4882a593Smuzhiyunint Xil_In32(unsigned long addr) 32*4882a593Smuzhiyun { 33*4882a593Smuzhiyun return readl(addr); 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun usleep(u32 sleep)36*4882a593Smuzhiyunvoid usleep(u32 sleep) 37*4882a593Smuzhiyun { 38*4882a593Smuzhiyun udelay(sleep); 39*4882a593Smuzhiyun } 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #endif /* XIL_IO_H */ 42