1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2010 Extreme Engineering Solutions, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <command.h>
9*4882a593Smuzhiyun #include <asm/processor.h>
10*4882a593Smuzhiyun #include <asm/mmu.h>
11*4882a593Smuzhiyun #include <asm/immap_85xx.h>
12*4882a593Smuzhiyun #include <asm/fsl_pci.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun #include <asm/cache.h>
15*4882a593Smuzhiyun #include <linux/libfdt.h>
16*4882a593Smuzhiyun #include <fdt_support.h>
17*4882a593Smuzhiyun #include <pca953x.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun extern void ft_board_pci_setup(void *blob, bd_t *bd);
22*4882a593Smuzhiyun
flash_cs_fixup(void)23*4882a593Smuzhiyun static void flash_cs_fixup(void)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun int flash_sel;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /*
28*4882a593Smuzhiyun * Print boot dev and swap flash flash chip selects if booted from 2nd
29*4882a593Smuzhiyun * flash. Swapping chip selects presents user with a common memory
30*4882a593Smuzhiyun * map regardless of which flash was booted from.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
33*4882a593Smuzhiyun CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS));
34*4882a593Smuzhiyun printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun if (flash_sel) {
37*4882a593Smuzhiyun set_lbc_br(0, CONFIG_SYS_BR1_PRELIM);
38*4882a593Smuzhiyun set_lbc_or(0, CONFIG_SYS_OR1_PRELIM);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun set_lbc_br(1, CONFIG_SYS_BR0_PRELIM);
41*4882a593Smuzhiyun set_lbc_or(1, CONFIG_SYS_OR0_PRELIM);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
board_early_init_r(void)45*4882a593Smuzhiyun int board_early_init_r(void)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun /* Initialize PCA9557 devices */
48*4882a593Smuzhiyun pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0);
49*4882a593Smuzhiyun pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0);
50*4882a593Smuzhiyun pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0);
51*4882a593Smuzhiyun pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun * Remap NOR flash region to caching-inhibited
55*4882a593Smuzhiyun * so that flash can be erased/programmed properly.
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* Flush d-cache and invalidate i-cache of any FLASH data */
59*4882a593Smuzhiyun flush_dcache();
60*4882a593Smuzhiyun invalidate_icache();
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* Invalidate existing TLB entry for NOR flash */
63*4882a593Smuzhiyun disable_tlb(0);
64*4882a593Smuzhiyun set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
65*4882a593Smuzhiyun (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
66*4882a593Smuzhiyun MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
67*4882a593Smuzhiyun 0, 0, BOOKE_PAGESZ_256M, 1);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun flash_cs_fixup();
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #if defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,bd_t * bd)75*4882a593Smuzhiyun int ft_board_setup(void *blob, bd_t *bd)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun #ifdef CONFIG_PCI
78*4882a593Smuzhiyun ft_board_pci_setup(blob, bd);
79*4882a593Smuzhiyun #endif
80*4882a593Smuzhiyun ft_cpu_setup(blob, bd);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun return 0;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun #endif
85