1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# Copyright 2012 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun# 4*4882a593Smuzhiyun# Refer docs/README.pblimage for more details about how-to configure 5*4882a593Smuzhiyun# and create PBL boot image 6*4882a593Smuzhiyun# 7*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun# 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#PBI commands 11*4882a593Smuzhiyun#Initialize CPC1 as 1MB SRAM 12*4882a593Smuzhiyun09010000 00200400 13*4882a593Smuzhiyun09138000 00000000 14*4882a593Smuzhiyun091380c0 00000100 15*4882a593Smuzhiyun09010100 00000000 16*4882a593Smuzhiyun09010104 fff0000b 17*4882a593Smuzhiyun09010f00 08000000 18*4882a593Smuzhiyun09010000 80000000 19*4882a593Smuzhiyun#Configure LAW for CPC1 20*4882a593Smuzhiyun09000d00 00000000 21*4882a593Smuzhiyun09000d04 fff00000 22*4882a593Smuzhiyun09000d08 81000013 23*4882a593Smuzhiyun09000010 00000000 24*4882a593Smuzhiyun09000014 ff000000 25*4882a593Smuzhiyun09000018 81000000 26*4882a593Smuzhiyun#Initialize eSPI controller, default configuration is slow for eSPI to 27*4882a593Smuzhiyun#load data, this configuration comes from u-boot eSPI driver. 28*4882a593Smuzhiyun09110000 80000403 29*4882a593Smuzhiyun09110020 2d170008 30*4882a593Smuzhiyun09110024 00100008 31*4882a593Smuzhiyun09110028 00100008 32*4882a593Smuzhiyun0911002c 00100008 33*4882a593Smuzhiyun#Flush PBL data 34*4882a593Smuzhiyun09138000 00000000 35*4882a593Smuzhiyun091380c0 00000000 36