1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Based on corenet_ds.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <command.h>
9*4882a593Smuzhiyun #include <netdev.h>
10*4882a593Smuzhiyun #include <linux/compiler.h>
11*4882a593Smuzhiyun #include <asm/mmu.h>
12*4882a593Smuzhiyun #include <asm/processor.h>
13*4882a593Smuzhiyun #include <asm/cache.h>
14*4882a593Smuzhiyun #include <asm/immap_85xx.h>
15*4882a593Smuzhiyun #include <asm/fsl_law.h>
16*4882a593Smuzhiyun #include <asm/fsl_serdes.h>
17*4882a593Smuzhiyun #include <asm/fsl_portals.h>
18*4882a593Smuzhiyun #include <asm/fsl_liodn.h>
19*4882a593Smuzhiyun #include <fm_eth.h>
20*4882a593Smuzhiyun #include <pci.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "cyrus.h"
23*4882a593Smuzhiyun #include "../common/eeprom.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define GPIO_OPENDRAIN 0x30000000
28*4882a593Smuzhiyun #define GPIO_DIR 0x3c000004
29*4882a593Smuzhiyun #define GPIO_INITIAL 0x30000000
30*4882a593Smuzhiyun #define GPIO_VGA_SWITCH 0x00001000
31*4882a593Smuzhiyun
checkboard(void)32*4882a593Smuzhiyun int checkboard(void)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun printf("Board: CYRUS\n");
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun return 0;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
board_early_init_f(void)39*4882a593Smuzhiyun int board_early_init_f(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
42*4882a593Smuzhiyun ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /*
45*4882a593Smuzhiyun * Only use DDR1_MCK0/3 and DDR2_MCK0/3
46*4882a593Smuzhiyun * disable DDR1_MCK1/2/4/5 and DDR2_MCK1/2/4/5 to reduce
47*4882a593Smuzhiyun * the noise introduced by these unterminated and unused clock pairs.
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun setbits_be32(&gur->ddrclkdr, 0x001B001B);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Set GPIO reset lines to open-drain, tristate */
52*4882a593Smuzhiyun setbits_be32(&pgpio->gpdat, GPIO_INITIAL);
53*4882a593Smuzhiyun setbits_be32(&pgpio->gpodr, GPIO_OPENDRAIN);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Set GPIO Direction */
56*4882a593Smuzhiyun setbits_be32(&pgpio->gpdir, GPIO_DIR);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
board_early_init_r(void)61*4882a593Smuzhiyun int board_early_init_r(void)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun fsl_lbc_t *lbc = LBC_BASE_ADDR;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun out_be32(&lbc->lbcr, 0);
66*4882a593Smuzhiyun /* 1 clock LALE cycle */
67*4882a593Smuzhiyun out_be32(&lbc->lcrr, 0x80000000 | CONFIG_SYS_LBC_LCRR);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun set_liodns();
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_QBMAN
72*4882a593Smuzhiyun setup_portals();
73*4882a593Smuzhiyun #endif
74*4882a593Smuzhiyun print_lbc_regs();
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
misc_init_r(void)78*4882a593Smuzhiyun int misc_init_r(void)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
ft_board_setup(void * blob,bd_t * bd)83*4882a593Smuzhiyun int ft_board_setup(void *blob, bd_t *bd)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun phys_addr_t base;
86*4882a593Smuzhiyun phys_size_t size;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun ft_cpu_setup(blob, bd);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun base = env_get_bootm_low();
91*4882a593Smuzhiyun size = env_get_bootm_size();
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun fdt_fixup_memory(blob, (u64)base, (u64)size);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #ifdef CONFIG_PCI
96*4882a593Smuzhiyun pci_of_setup(blob, bd);
97*4882a593Smuzhiyun #endif
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun fdt_fixup_liodn(blob);
100*4882a593Smuzhiyun fsl_fdt_fixup_dr_usb(blob, bd);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun #ifdef CONFIG_SYS_DPAA_FMAN
103*4882a593Smuzhiyun fdt_fixup_fman_ethernet(blob);
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
mac_read_from_eeprom(void)109*4882a593Smuzhiyun int mac_read_from_eeprom(void)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun init_eeprom(CONFIG_SYS_EEPROM_BUS_NUM,
112*4882a593Smuzhiyun CONFIG_SYS_I2C_EEPROM_ADDR,
113*4882a593Smuzhiyun CONFIG_SYS_I2C_EEPROM_ADDR_LEN);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun return mac_read_from_eeprom_common();
116*4882a593Smuzhiyun }
117