1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Refer doc/README.imximage for more details about how-to configure 7*4882a593Smuzhiyun * and create imximage boot image 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * The syntax is taken as close as possible with the kwbimage 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/* image version */ 13*4882a593SmuzhiyunIMAGE_VERSION 2 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun#define __ASSEMBLY__ 16*4882a593Smuzhiyun#include <config.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/* 19*4882a593Smuzhiyun * Boot Device : one of 20*4882a593Smuzhiyun * spi, sd (the board has no nand neither onenand) 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun#if defined(CONFIG_TQMA6X_MMC_BOOT) 23*4882a593SmuzhiyunBOOT_FROM sd 24*4882a593Smuzhiyun#elif defined(CONFIG_TQMA6X_SPI_BOOT) 25*4882a593SmuzhiyunBOOT_FROM spi 26*4882a593Smuzhiyun#endif 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun#include "asm/arch/mx6-ddr.h" 29*4882a593Smuzhiyun#include "asm/arch/iomux.h" 30*4882a593Smuzhiyun#include "asm/arch/crm_regs.h" 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun/* TQMa6S DDR config Rev. 0100B */ 33*4882a593Smuzhiyun/* IOMUX configuration */ 34*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 35*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 36*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00008000 37*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030 38*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_CAS, 0x00008030 39*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_RAS, 0x00008030 40*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 41*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_RESET, 0x000C3030 42*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 43*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000 44*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 45*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 46*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 47*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 48*4882a593SmuzhiyunDATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 49*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 50*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 51*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 52*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 53*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS4, 0x00000000 54*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS5, 0x00000000 55*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS6, 0x00000000 56*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_SDQS7, 0x00000000 57*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 58*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B0DS, 0x00000030 59*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B1DS, 0x00000030 60*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B2DS, 0x00000030 61*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B3DS, 0x00000030 62*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B4DS, 0x00000000 63*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B5DS, 0x00000000 64*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B6DS, 0x00000000 65*4882a593SmuzhiyunDATA 4, MX6_IOM_GRP_B7DS, 0x00000000 66*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM0, 0x00000030 67*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM1, 0x00000030 68*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM2, 0x00000030 69*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM3, 0x00000030 70*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM4, 0x00000000 71*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM5, 0x00000000 72*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM6, 0x00000000 73*4882a593SmuzhiyunDATA 4, MX6_IOM_DRAM_DQM7, 0x00000000 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun/* memory interface calibration values */ 76*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 77*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1380000 78*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0014000E 79*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00120014 80*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00000000 81*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00000000 82*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x0240023C 83*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x0228022C 84*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x00000000 85*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x00000000 86*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4A4A4E4A 87*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x00000000 88*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36362A32 89*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x00000000 90*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 91*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 92*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 93*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 94*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x00000000 95*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x00000000 96*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x00000000 97*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x00000000 98*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 99*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPMUR0, 0x00000000 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun/* configure memory interface */ 102*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D 103*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 104*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333 105*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63 106*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB 107*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 108*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 109*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 110*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDOR, 0x00431023 111*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDASP, 0x00000017 112*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCTL, 0x83190000 113*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00008032 114*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 115*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 116*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x05208030 117*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 118*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDREF, 0x00005800 119*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222 120*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 121*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDPDC, 0x0002552D 122*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MAPSR, 0x00001006 123*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun#include "clocks.cfg" 126