1 /*
2 * Copyright 2017 Toradex AG
3 *
4 * FSL DCU platform driver
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <asm/arch/crm_regs.h>
9 #include <asm/io.h>
10 #include <common.h>
11 #include <fsl_dcu_fb.h>
12 #include "div64.h"
13
14 DECLARE_GLOBAL_DATA_PTR;
15
dcu_set_pixel_clock(unsigned int pixclock)16 unsigned int dcu_set_pixel_clock(unsigned int pixclock)
17 {
18 struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR;
19 unsigned long long div;
20
21 clrbits_le32(&ccm->cscmr1, CCM_CSCMR1_DCU0_CLK_SEL);
22 clrsetbits_le32(&ccm->cscdr3,
23 CCM_CSCDR3_DCU0_DIV_MASK | CCM_CSCDR3_DCU0_EN,
24 CCM_CSCDR3_DCU0_DIV(0) | CCM_CSCDR3_DCU0_EN);
25 div = (unsigned long long)(PLL1_PFD2_FREQ / 1000);
26 do_div(div, pixclock);
27
28 return div;
29 }
30
platform_dcu_init(unsigned int xres,unsigned int yres,const char * port,struct fb_videomode * dcu_fb_videomode)31 int platform_dcu_init(unsigned int xres, unsigned int yres,
32 const char *port,
33 struct fb_videomode *dcu_fb_videomode)
34 {
35 fsl_dcu_init(xres, yres, 32);
36
37 return 0;
38 }
39