1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2014-2016
3*4882a593Smuzhiyun * Stefan Agner <stefan@agner.ch>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <asm/arch/gp_padctrl.h>
10*4882a593Smuzhiyun #include <asm/arch/pinmux.h>
11*4882a593Smuzhiyun #include <asm/arch-tegra/ap.h>
12*4882a593Smuzhiyun #include <asm/arch-tegra/tegra.h>
13*4882a593Smuzhiyun #include <asm/gpio.h>
14*4882a593Smuzhiyun #include <asm/io.h>
15*4882a593Smuzhiyun #include <i2c.h>
16*4882a593Smuzhiyun #include "pinmux-config-colibri_t30.h"
17*4882a593Smuzhiyun #include "../common/tdx-common.h"
18*4882a593Smuzhiyun
arch_misc_init(void)19*4882a593Smuzhiyun int arch_misc_init(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
22*4882a593Smuzhiyun NVBOOTTYPE_RECOVERY)
23*4882a593Smuzhiyun printf("USB recovery mode\n");
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun return 0;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
checkboard(void)28*4882a593Smuzhiyun int checkboard(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun puts("Model: Toradex Colibri T30 1GB\n");
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun return 0;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,bd_t * bd)36*4882a593Smuzhiyun int ft_board_setup(void *blob, bd_t *bd)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun return ft_common_board_setup(blob, bd);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun #endif
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun * Routine: pinmux_init
44*4882a593Smuzhiyun * Description: Do individual peripheral pinmux configs
45*4882a593Smuzhiyun */
pinmux_init(void)46*4882a593Smuzhiyun void pinmux_init(void)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun pinmux_config_pingrp_table(tegra3_pinmux_common,
49*4882a593Smuzhiyun ARRAY_SIZE(tegra3_pinmux_common));
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun pinmux_config_pingrp_table(unused_pins_lowpower,
52*4882a593Smuzhiyun ARRAY_SIZE(unused_pins_lowpower));
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* Initialize any non-default pad configs (APB_MISC_GP regs) */
55*4882a593Smuzhiyun pinmux_config_drvgrp_table(colibri_t30_padctrl,
56*4882a593Smuzhiyun ARRAY_SIZE(colibri_t30_padctrl));
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun * Enable AX88772B USB to LAN controller
61*4882a593Smuzhiyun */
pin_mux_usb(void)62*4882a593Smuzhiyun void pin_mux_usb(void)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun /* Reset ASIX using LAN_RESET */
65*4882a593Smuzhiyun gpio_request(TEGRA_GPIO(DD, 0), "LAN_RESET");
66*4882a593Smuzhiyun gpio_direction_output(TEGRA_GPIO(DD, 0), 0);
67*4882a593Smuzhiyun udelay(5);
68*4882a593Smuzhiyun gpio_set_value(TEGRA_GPIO(DD, 0), 1);
69*4882a593Smuzhiyun }
70