1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2014-2016, Toradex AG
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun /*
8*4882a593Smuzhiyun * Helpers for Freescale PMIC PF0100
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
14*4882a593Smuzhiyun #include <asm/arch/iomux.h>
15*4882a593Smuzhiyun #include <asm/arch/mx6-pins.h>
16*4882a593Smuzhiyun #include <asm/gpio.h>
17*4882a593Smuzhiyun #include <asm/mach-imx/iomux-v3.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "pf0100_otp.inc"
20*4882a593Smuzhiyun #include "pf0100.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* define for PMIC register dump */
23*4882a593Smuzhiyun /*#define DEBUG */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /* use GPIO: EXT_IO1 to switch on VPGM, ON: 1 */
26*4882a593Smuzhiyun static iomux_v3_cfg_t const pmic_prog_pads[] = {
27*4882a593Smuzhiyun MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(NO_PAD_CTRL),
28*4882a593Smuzhiyun # define PMIC_PROG_VOLTAGE IMX_GPIO_NR(2, 3)
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun
pmic_init(void)31*4882a593Smuzhiyun unsigned pmic_init(void)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun unsigned programmed = 0;
34*4882a593Smuzhiyun uchar bus = 1;
35*4882a593Smuzhiyun uchar devid, revid, val;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun puts("PMIC: ");
38*4882a593Smuzhiyun if (!((0 == i2c_set_bus_num(bus)) &&
39*4882a593Smuzhiyun (0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
40*4882a593Smuzhiyun puts("i2c bus failed\n");
41*4882a593Smuzhiyun return 0;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun /* get device ident */
44*4882a593Smuzhiyun if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) {
45*4882a593Smuzhiyun puts("i2c pmic devid read failed\n");
46*4882a593Smuzhiyun return 0;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) {
49*4882a593Smuzhiyun puts("i2c pmic revid read failed\n");
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun printf("device id: 0x%.2x, revision id: 0x%.2x\n", devid, revid);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #ifdef DEBUG
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun unsigned i, j;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun for (i = 0; i < 16; i++)
59*4882a593Smuzhiyun printf("\t%x", i);
60*4882a593Smuzhiyun for (j = 0; j < 0x80; ) {
61*4882a593Smuzhiyun printf("\n%2x", j);
62*4882a593Smuzhiyun for (i = 0; i < 16; i++) {
63*4882a593Smuzhiyun i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
64*4882a593Smuzhiyun printf("\t%2x", val);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun j += 0x10;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun printf("\nEXT Page 1");
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun val = PFUZE100_PAGE_REGISTER_PAGE1;
71*4882a593Smuzhiyun if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
72*4882a593Smuzhiyun &val, 1)) {
73*4882a593Smuzhiyun puts("i2c write failed\n");
74*4882a593Smuzhiyun return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun for (j = 0x80; j < 0x100; ) {
78*4882a593Smuzhiyun printf("\n%2x", j);
79*4882a593Smuzhiyun for (i = 0; i < 16; i++) {
80*4882a593Smuzhiyun i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
81*4882a593Smuzhiyun printf("\t%2x", val);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun j += 0x10;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun printf("\nEXT Page 2");
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun val = PFUZE100_PAGE_REGISTER_PAGE2;
88*4882a593Smuzhiyun if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
89*4882a593Smuzhiyun &val, 1)) {
90*4882a593Smuzhiyun puts("i2c write failed\n");
91*4882a593Smuzhiyun return 0;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun for (j = 0x80; j < 0x100; ) {
95*4882a593Smuzhiyun printf("\n%2x", j);
96*4882a593Smuzhiyun for (i = 0; i < 16; i++) {
97*4882a593Smuzhiyun i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
98*4882a593Smuzhiyun printf("\t%2x", val);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun j += 0x10;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun printf("\n");
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun /* get device programmed state */
106*4882a593Smuzhiyun val = PFUZE100_PAGE_REGISTER_PAGE1;
107*4882a593Smuzhiyun if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) {
108*4882a593Smuzhiyun puts("i2c write failed\n");
109*4882a593Smuzhiyun return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) {
112*4882a593Smuzhiyun puts("i2c fuse_por read failed\n");
113*4882a593Smuzhiyun return 0;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun if (val & PFUZE100_FUSE_POR_M)
116*4882a593Smuzhiyun programmed++;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) {
119*4882a593Smuzhiyun puts("i2c fuse_por read failed\n");
120*4882a593Smuzhiyun return programmed;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun if (val & PFUZE100_FUSE_POR_M)
123*4882a593Smuzhiyun programmed++;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) {
126*4882a593Smuzhiyun puts("i2c fuse_por read failed\n");
127*4882a593Smuzhiyun return programmed;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun if (val & PFUZE100_FUSE_POR_M)
130*4882a593Smuzhiyun programmed++;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun switch (programmed) {
133*4882a593Smuzhiyun case 0:
134*4882a593Smuzhiyun printf("PMIC: not programmed\n");
135*4882a593Smuzhiyun break;
136*4882a593Smuzhiyun case 3:
137*4882a593Smuzhiyun printf("PMIC: programmed\n");
138*4882a593Smuzhiyun break;
139*4882a593Smuzhiyun default:
140*4882a593Smuzhiyun printf("PMIC: undefined programming state\n");
141*4882a593Smuzhiyun break;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return programmed;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
pf0100_prog(void)147*4882a593Smuzhiyun int pf0100_prog(void)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun unsigned char bus = 1;
150*4882a593Smuzhiyun unsigned char val;
151*4882a593Smuzhiyun unsigned int i;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (pmic_init() == 3) {
154*4882a593Smuzhiyun puts("PMIC already programmed, exiting\n");
155*4882a593Smuzhiyun return CMD_RET_FAILURE;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun /* set up gpio to manipulate vprog, initially off */
158*4882a593Smuzhiyun imx_iomux_v3_setup_multiple_pads(pmic_prog_pads,
159*4882a593Smuzhiyun ARRAY_SIZE(pmic_prog_pads));
160*4882a593Smuzhiyun gpio_direction_output(PMIC_PROG_VOLTAGE, 0);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (!((0 == i2c_set_bus_num(bus)) &&
163*4882a593Smuzhiyun (0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
164*4882a593Smuzhiyun puts("i2c bus failed\n");
165*4882a593Smuzhiyun return CMD_RET_FAILURE;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pmic_otp_prog); i++) {
169*4882a593Smuzhiyun switch (pmic_otp_prog[i].cmd) {
170*4882a593Smuzhiyun case pmic_i2c:
171*4882a593Smuzhiyun val = (unsigned char) (pmic_otp_prog[i].value & 0xff);
172*4882a593Smuzhiyun if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg,
173*4882a593Smuzhiyun 1, &val, 1)) {
174*4882a593Smuzhiyun printf("i2c write failed, reg 0x%2x, value 0x%2x\n",
175*4882a593Smuzhiyun pmic_otp_prog[i].reg, val);
176*4882a593Smuzhiyun return CMD_RET_FAILURE;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun break;
179*4882a593Smuzhiyun case pmic_delay:
180*4882a593Smuzhiyun udelay(pmic_otp_prog[i].value * 1000);
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun case pmic_vpgm:
183*4882a593Smuzhiyun gpio_direction_output(PMIC_PROG_VOLTAGE,
184*4882a593Smuzhiyun pmic_otp_prog[i].value);
185*4882a593Smuzhiyun break;
186*4882a593Smuzhiyun case pmic_pwr:
187*4882a593Smuzhiyun /* TODO */
188*4882a593Smuzhiyun break;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun return CMD_RET_SUCCESS;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
do_pf0100_prog(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])194*4882a593Smuzhiyun int do_pf0100_prog(cmd_tbl_t *cmdtp, int flag, int argc,
195*4882a593Smuzhiyun char * const argv[])
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun int ret;
198*4882a593Smuzhiyun puts("Programming PMIC OTP...");
199*4882a593Smuzhiyun ret = pf0100_prog();
200*4882a593Smuzhiyun if (ret == CMD_RET_SUCCESS)
201*4882a593Smuzhiyun puts("done.\n");
202*4882a593Smuzhiyun else
203*4882a593Smuzhiyun puts("failed.\n");
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun U_BOOT_CMD(
208*4882a593Smuzhiyun pf0100_otp_prog, 1, 0, do_pf0100_prog,
209*4882a593Smuzhiyun "Program the OTP fuses on the PMIC PF0100",
210*4882a593Smuzhiyun ""
211*4882a593Smuzhiyun );
212