1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2013 Boundary Devices 3*4882a593Smuzhiyun * Copyright (C) 2014-2016, Toradex AG 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D 9*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG0, 0x2C305503 10*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8D63 11*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB 12*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 13*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDOR, 0x00301023 14*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 15*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D 16*4882a593Smuzhiyun/* CS0 End: 7MSB of ((0x10000000 + 512M) -1) >> 25 */ 17*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDASP, 0x00000017 18*4882a593Smuzhiyun/* DDR3 DATA BUS SIZE: 64BIT */ 19*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDCTL, 0x821A0000 20*4882a593Smuzhiyun/* DDR3 DATA BUS SIZE: 32BIT */ 21*4882a593Smuzhiyun/* DATA 4, MX6_MMDC_P0_MDCTL, 0x82190000 */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun/* Write commands to DDR */ 24*4882a593Smuzhiyun/* Load Mode Registers */ 25*4882a593Smuzhiyun/* TODO Use Auto Self-Refresh mode (Extended Temperature)*/ 26*4882a593Smuzhiyun/* DATA 4, MX6_MMDC_P0_MDSCR, 0x04408032 */ 27*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 28*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 29*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 30*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 31*4882a593Smuzhiyun/* ZQ calibration */ 32*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 35*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 36*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDREF, 0x00005800 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00000000 39*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00000000 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42360232 42*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021F022A 43*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x421E0224 44*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02110218 45*4882a593Smuzhiyun 46*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x41434344 47*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4345423E 48*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x39383339 49*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3E363930 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00340039 52*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x002C002D 53*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00120019 54*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 57*4882a593SmuzhiyunDATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 58*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 59*4882a593SmuzhiyunDATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 60