1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2016, Toradex, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _PINMUX_CONFIG_APALIS_TK1_H_ 8*4882a593Smuzhiyun #define _PINMUX_CONFIG_APALIS_TK1_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define GPIO_INIT(_port, _gpio, _init) \ 11*4882a593Smuzhiyun { \ 12*4882a593Smuzhiyun .gpio = TEGRA_GPIO(_port, _gpio), \ 13*4882a593Smuzhiyun .init = TEGRA_GPIO_INIT_##_init, \ 14*4882a593Smuzhiyun } 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = { 17*4882a593Smuzhiyun /* port, pin, init_val */ 18*4882a593Smuzhiyun GPIO_INIT(A, 1, IN), 19*4882a593Smuzhiyun GPIO_INIT(B, 1, IN), 20*4882a593Smuzhiyun GPIO_INIT(C, 0, OUT0), 21*4882a593Smuzhiyun GPIO_INIT(I, 5, IN), 22*4882a593Smuzhiyun GPIO_INIT(I, 6, IN), 23*4882a593Smuzhiyun GPIO_INIT(J, 0, IN), 24*4882a593Smuzhiyun GPIO_INIT(J, 2, IN), 25*4882a593Smuzhiyun GPIO_INIT(K, 2, IN), 26*4882a593Smuzhiyun GPIO_INIT(K, 7, IN), 27*4882a593Smuzhiyun GPIO_INIT(N, 2, OUT1), 28*4882a593Smuzhiyun GPIO_INIT(N, 4, OUT1), 29*4882a593Smuzhiyun GPIO_INIT(N, 5, OUT1), 30*4882a593Smuzhiyun GPIO_INIT(N, 7, IN), 31*4882a593Smuzhiyun GPIO_INIT(O, 5, IN), 32*4882a593Smuzhiyun GPIO_INIT(Q, 0, OUT0), /* Shift_CTRL_OE[0] */ 33*4882a593Smuzhiyun GPIO_INIT(Q, 1, OUT0), /* Shift_CTRL_OE[1] */ 34*4882a593Smuzhiyun GPIO_INIT(Q, 2, OUT0), /* Shift_CTRL_OE[2] */ 35*4882a593Smuzhiyun GPIO_INIT(Q, 4, OUT0), /* Shift_CTRL_OE[4] */ 36*4882a593Smuzhiyun GPIO_INIT(Q, 5, OUT1), /* Shift_CTRL_Dir_Out[0] */ 37*4882a593Smuzhiyun GPIO_INIT(Q, 6, OUT1), /* Shift_CTRL_Dir_Out[1] */ 38*4882a593Smuzhiyun GPIO_INIT(Q, 7, OUT1), /* Shift_CTRL_Dir_Out[2] */ 39*4882a593Smuzhiyun GPIO_INIT(R, 0, OUT0), /* Shift_CTRL_Dir_In[0] */ 40*4882a593Smuzhiyun GPIO_INIT(R, 1, OUT0), /* Shift_CTRL_Dir_In[1] */ 41*4882a593Smuzhiyun GPIO_INIT(R, 2, OUT0), /* Shift_CTRL_OE[3] */ 42*4882a593Smuzhiyun GPIO_INIT(S, 3, OUT0), /* Shift_CTRL_Dir_In[2] */ 43*4882a593Smuzhiyun GPIO_INIT(U, 4, OUT1), 44*4882a593Smuzhiyun GPIO_INIT(W, 3, IN), 45*4882a593Smuzhiyun GPIO_INIT(W, 5, IN), 46*4882a593Smuzhiyun GPIO_INIT(BB, 0, IN), 47*4882a593Smuzhiyun GPIO_INIT(BB, 3, OUT0), 48*4882a593Smuzhiyun GPIO_INIT(BB, 4, IN), 49*4882a593Smuzhiyun GPIO_INIT(BB, 5, OUT1), 50*4882a593Smuzhiyun GPIO_INIT(BB, 6, OUT0), 51*4882a593Smuzhiyun GPIO_INIT(CC, 5, IN), 52*4882a593Smuzhiyun GPIO_INIT(DD, 3, IN), 53*4882a593Smuzhiyun GPIO_INIT(EE, 3, IN), 54*4882a593Smuzhiyun GPIO_INIT(EE, 5, IN), 55*4882a593Smuzhiyun GPIO_INIT(FF, 1, IN), 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \ 59*4882a593Smuzhiyun { \ 60*4882a593Smuzhiyun .pingrp = PMUX_PINGRP_##_pingrp, \ 61*4882a593Smuzhiyun .func = PMUX_FUNC_##_mux, \ 62*4882a593Smuzhiyun .pull = PMUX_PULL_##_pull, \ 63*4882a593Smuzhiyun .tristate = PMUX_TRI_##_tri, \ 64*4882a593Smuzhiyun .io = PMUX_PIN_##_io, \ 65*4882a593Smuzhiyun .od = PMUX_PIN_OD_##_od, \ 66*4882a593Smuzhiyun .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \ 67*4882a593Smuzhiyun .lock = PMUX_PIN_LOCK_DEFAULT, \ 68*4882a593Smuzhiyun .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \ 69*4882a593Smuzhiyun } 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun static const struct pmux_pingrp_config apalis_tk1_pingrps[] = { 72*4882a593Smuzhiyun /* pingrp, mux, pull, tri, e_input, od, rcv_sel */ 73*4882a593Smuzhiyun PINCFG(CLK_32K_OUT_PA0, SOC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 74*4882a593Smuzhiyun PINCFG(UART3_CTS_N_PA1, GMI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 75*4882a593Smuzhiyun PINCFG(DAP2_FS_PA2, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 76*4882a593Smuzhiyun PINCFG(DAP2_SCLK_PA3, HDA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 77*4882a593Smuzhiyun PINCFG(DAP2_DIN_PA4, HDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 78*4882a593Smuzhiyun PINCFG(DAP2_DOUT_PA5, HDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 79*4882a593Smuzhiyun PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 80*4882a593Smuzhiyun PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 81*4882a593Smuzhiyun PINCFG(PB0, UARTD, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 82*4882a593Smuzhiyun PINCFG(PB1, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 83*4882a593Smuzhiyun PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 84*4882a593Smuzhiyun PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 85*4882a593Smuzhiyun PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 86*4882a593Smuzhiyun PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 87*4882a593Smuzhiyun PINCFG(UART3_RTS_N_PC0, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 88*4882a593Smuzhiyun PINCFG(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 89*4882a593Smuzhiyun PINCFG(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 90*4882a593Smuzhiyun PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 91*4882a593Smuzhiyun PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 92*4882a593Smuzhiyun PINCFG(PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 93*4882a593Smuzhiyun PINCFG(PG0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 94*4882a593Smuzhiyun PINCFG(PG1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 95*4882a593Smuzhiyun PINCFG(PG2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 96*4882a593Smuzhiyun PINCFG(PG3, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 97*4882a593Smuzhiyun PINCFG(PG4, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 98*4882a593Smuzhiyun PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 99*4882a593Smuzhiyun PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 100*4882a593Smuzhiyun PINCFG(PG7, SPI4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 101*4882a593Smuzhiyun PINCFG(PH0, PWM0, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 102*4882a593Smuzhiyun PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 103*4882a593Smuzhiyun PINCFG(PH2, PWM2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 104*4882a593Smuzhiyun PINCFG(PH3, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 105*4882a593Smuzhiyun PINCFG(PH4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 106*4882a593Smuzhiyun PINCFG(PH5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 107*4882a593Smuzhiyun PINCFG(PH6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 108*4882a593Smuzhiyun PINCFG(PH7, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 109*4882a593Smuzhiyun PINCFG(PI0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 110*4882a593Smuzhiyun PINCFG(PI1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 111*4882a593Smuzhiyun PINCFG(PI2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 112*4882a593Smuzhiyun PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 113*4882a593Smuzhiyun PINCFG(PI4, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 114*4882a593Smuzhiyun PINCFG(PI5, RSVD2, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 115*4882a593Smuzhiyun PINCFG(PI6, RSVD1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 116*4882a593Smuzhiyun PINCFG(PI7, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 117*4882a593Smuzhiyun PINCFG(PJ0, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 118*4882a593Smuzhiyun PINCFG(PJ2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 119*4882a593Smuzhiyun PINCFG(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 120*4882a593Smuzhiyun PINCFG(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 121*4882a593Smuzhiyun PINCFG(PJ7, UARTD, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 122*4882a593Smuzhiyun PINCFG(PK0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 123*4882a593Smuzhiyun PINCFG(PK1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 124*4882a593Smuzhiyun PINCFG(PK2, RSVD1, UP, TRISTATE, INPUT, ENABLE, DEFAULT), 125*4882a593Smuzhiyun PINCFG(PK3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 126*4882a593Smuzhiyun PINCFG(PK4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 127*4882a593Smuzhiyun PINCFG(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 128*4882a593Smuzhiyun PINCFG(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 129*4882a593Smuzhiyun PINCFG(PK7, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 130*4882a593Smuzhiyun PINCFG(DAP1_FS_PN0, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 131*4882a593Smuzhiyun PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 132*4882a593Smuzhiyun PINCFG(DAP1_DOUT_PN2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 133*4882a593Smuzhiyun PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 134*4882a593Smuzhiyun PINCFG(USB_VBUS_EN0_PN4, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), 135*4882a593Smuzhiyun PINCFG(USB_VBUS_EN1_PN5, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT), 136*4882a593Smuzhiyun PINCFG(HDMI_INT_PN7, RSVD1, DOWN, TRISTATE, INPUT, DEFAULT, NORMAL), 137*4882a593Smuzhiyun PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 138*4882a593Smuzhiyun PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 139*4882a593Smuzhiyun PINCFG(ULPI_DATA1_PO2, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 140*4882a593Smuzhiyun PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 141*4882a593Smuzhiyun PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 142*4882a593Smuzhiyun PINCFG(ULPI_DATA4_PO5, ULPI, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 143*4882a593Smuzhiyun PINCFG(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 144*4882a593Smuzhiyun PINCFG(ULPI_DATA6_PO7, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 145*4882a593Smuzhiyun PINCFG(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 146*4882a593Smuzhiyun PINCFG(DAP3_DIN_PP1, I2S2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 147*4882a593Smuzhiyun PINCFG(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 148*4882a593Smuzhiyun PINCFG(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 149*4882a593Smuzhiyun PINCFG(DAP4_FS_PP4, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 150*4882a593Smuzhiyun PINCFG(DAP4_DIN_PP5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 151*4882a593Smuzhiyun PINCFG(DAP4_DOUT_PP6, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 152*4882a593Smuzhiyun PINCFG(DAP4_SCLK_PP7, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 153*4882a593Smuzhiyun PINCFG(KB_COL0_PQ0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 154*4882a593Smuzhiyun PINCFG(KB_COL1_PQ1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 155*4882a593Smuzhiyun PINCFG(KB_COL2_PQ2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 156*4882a593Smuzhiyun PINCFG(KB_COL3_PQ3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 157*4882a593Smuzhiyun PINCFG(KB_COL4_PQ4, KBC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 158*4882a593Smuzhiyun PINCFG(KB_COL5_PQ5, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 159*4882a593Smuzhiyun PINCFG(KB_COL6_PQ6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 160*4882a593Smuzhiyun PINCFG(KB_COL7_PQ7, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 161*4882a593Smuzhiyun PINCFG(KB_ROW0_PR0, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 162*4882a593Smuzhiyun PINCFG(KB_ROW1_PR1, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 163*4882a593Smuzhiyun PINCFG(KB_ROW2_PR2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 164*4882a593Smuzhiyun PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 165*4882a593Smuzhiyun PINCFG(KB_ROW4_PR4, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 166*4882a593Smuzhiyun PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 167*4882a593Smuzhiyun PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 168*4882a593Smuzhiyun PINCFG(KB_ROW7_PR7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 169*4882a593Smuzhiyun PINCFG(KB_ROW8_PS0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 170*4882a593Smuzhiyun PINCFG(KB_ROW9_PS1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 171*4882a593Smuzhiyun PINCFG(KB_ROW10_PS2, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 172*4882a593Smuzhiyun PINCFG(KB_ROW11_PS3, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 173*4882a593Smuzhiyun PINCFG(KB_ROW12_PS4, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 174*4882a593Smuzhiyun PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 175*4882a593Smuzhiyun PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 176*4882a593Smuzhiyun PINCFG(KB_ROW15_PS7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 177*4882a593Smuzhiyun PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 178*4882a593Smuzhiyun PINCFG(KB_ROW17_PT1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 179*4882a593Smuzhiyun PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 180*4882a593Smuzhiyun PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 181*4882a593Smuzhiyun PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 182*4882a593Smuzhiyun PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 183*4882a593Smuzhiyun PINCFG(PU1, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 184*4882a593Smuzhiyun PINCFG(PU2, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 185*4882a593Smuzhiyun PINCFG(PU3, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 186*4882a593Smuzhiyun PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 187*4882a593Smuzhiyun PINCFG(PU5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 188*4882a593Smuzhiyun PINCFG(PU6, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 189*4882a593Smuzhiyun PINCFG(PV0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 190*4882a593Smuzhiyun PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 191*4882a593Smuzhiyun PINCFG(SDMMC3_CD_N_PV2, RSVD3, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 192*4882a593Smuzhiyun PINCFG(SDMMC1_WP_N_PV3, SDMMC1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 193*4882a593Smuzhiyun PINCFG(DDC_SCL_PV4, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 194*4882a593Smuzhiyun PINCFG(DDC_SDA_PV5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 195*4882a593Smuzhiyun PINCFG(GPIO_W2_AUD_PW2, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 196*4882a593Smuzhiyun PINCFG(GPIO_W3_AUD_PW3, SPI6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 197*4882a593Smuzhiyun PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 198*4882a593Smuzhiyun PINCFG(CLK2_OUT_PW5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 199*4882a593Smuzhiyun PINCFG(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 200*4882a593Smuzhiyun PINCFG(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 201*4882a593Smuzhiyun PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 202*4882a593Smuzhiyun PINCFG(GPIO_X1_AUD_PX1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 203*4882a593Smuzhiyun PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 204*4882a593Smuzhiyun PINCFG(GPIO_X3_AUD_PX3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 205*4882a593Smuzhiyun PINCFG(GPIO_X4_AUD_PX4, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 206*4882a593Smuzhiyun PINCFG(GPIO_X5_AUD_PX5, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 207*4882a593Smuzhiyun PINCFG(GPIO_X6_AUD_PX6, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 208*4882a593Smuzhiyun PINCFG(GPIO_X7_AUD_PX7, SPI2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 209*4882a593Smuzhiyun PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 210*4882a593Smuzhiyun PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 211*4882a593Smuzhiyun PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 212*4882a593Smuzhiyun PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 213*4882a593Smuzhiyun PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 214*4882a593Smuzhiyun PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 215*4882a593Smuzhiyun PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 216*4882a593Smuzhiyun PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 217*4882a593Smuzhiyun PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 218*4882a593Smuzhiyun PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 219*4882a593Smuzhiyun PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 220*4882a593Smuzhiyun PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 221*4882a593Smuzhiyun PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 222*4882a593Smuzhiyun PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 223*4882a593Smuzhiyun PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 224*4882a593Smuzhiyun PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 225*4882a593Smuzhiyun PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 226*4882a593Smuzhiyun PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 227*4882a593Smuzhiyun PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 228*4882a593Smuzhiyun PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), 229*4882a593Smuzhiyun PINCFG(PBB0, VGP6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 230*4882a593Smuzhiyun PINCFG(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 231*4882a593Smuzhiyun PINCFG(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), 232*4882a593Smuzhiyun PINCFG(PBB3, VGP3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 233*4882a593Smuzhiyun PINCFG(PBB4, VGP4, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 234*4882a593Smuzhiyun PINCFG(PBB5, VGP5, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 235*4882a593Smuzhiyun PINCFG(PBB6, RSVD2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 236*4882a593Smuzhiyun PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 237*4882a593Smuzhiyun PINCFG(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 238*4882a593Smuzhiyun PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 239*4882a593Smuzhiyun PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 240*4882a593Smuzhiyun PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 241*4882a593Smuzhiyun PINCFG(CLK2_REQ_PCC5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 242*4882a593Smuzhiyun PINCFG(PEX_L0_RST_N_PDD1, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 243*4882a593Smuzhiyun PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 244*4882a593Smuzhiyun PINCFG(PEX_WAKE_N_PDD3, RSVD2, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 245*4882a593Smuzhiyun PINCFG(PEX_L1_RST_N_PDD5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 246*4882a593Smuzhiyun PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 247*4882a593Smuzhiyun PINCFG(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 248*4882a593Smuzhiyun PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 249*4882a593Smuzhiyun PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), 250*4882a593Smuzhiyun PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), 251*4882a593Smuzhiyun /* 252*4882a593Smuzhiyun * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not 253*4882a593Smuzhiyun * tristated and input driver enabled as well as it features some magic 254*4882a593Smuzhiyun * properties even though the external loopback is disabled and the internal 255*4882a593Smuzhiyun * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits 256*4882a593Smuzhiyun * being set to 0xfffd according to the TRM! 257*4882a593Smuzhiyun */ 258*4882a593Smuzhiyun PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 259*4882a593Smuzhiyun PINCFG(SDMMC3_CLK_LB_IN_PEE5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 260*4882a593Smuzhiyun PINCFG(DP_HPD_PFF0, DP, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 261*4882a593Smuzhiyun PINCFG(USB_VBUS_EN2_PFF1, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), 262*4882a593Smuzhiyun PINCFG(PFF2, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT), 263*4882a593Smuzhiyun PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 264*4882a593Smuzhiyun PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), 265*4882a593Smuzhiyun PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT), 266*4882a593Smuzhiyun PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), 267*4882a593Smuzhiyun PINCFG(OWR, RSVD2, NORMAL, TRISTATE, OUTPUT, DEFAULT, NORMAL), 268*4882a593Smuzhiyun PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT), 269*4882a593Smuzhiyun PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), 270*4882a593Smuzhiyun }; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun #define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ 273*4882a593Smuzhiyun { \ 274*4882a593Smuzhiyun .drvgrp = PMUX_DRVGRP_##_drvgrp, \ 275*4882a593Smuzhiyun .slwf = _slwf, \ 276*4882a593Smuzhiyun .slwr = _slwr, \ 277*4882a593Smuzhiyun .drvup = _drvup, \ 278*4882a593Smuzhiyun .drvdn = _drvdn, \ 279*4882a593Smuzhiyun .lpmd = PMUX_LPMD_##_lpmd, \ 280*4882a593Smuzhiyun .schmt = PMUX_SCHMT_##_schmt, \ 281*4882a593Smuzhiyun .hsm = PMUX_HSM_##_hsm, \ 282*4882a593Smuzhiyun } 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun static const struct pmux_drvgrp_config apalis_tk1_drvgrps[] = { 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun 287*4882a593Smuzhiyun #endif /* PINMUX_CONFIG_APALIS_TK1_H */ 288