xref: /OK3568_Linux_fs/u-boot/board/ti/ks2_evm/board_k2hk.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * K2HK EVM : Board initialization
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * (C) Copyright 2012-2014
5*4882a593Smuzhiyun  *     Texas Instruments Incorporated, <www.ti.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:     GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <asm/arch/clock.h>
12*4882a593Smuzhiyun #include <asm/arch/hardware.h>
13*4882a593Smuzhiyun #include <asm/ti-common/keystone_net.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun unsigned int external_clk[ext_clk_count] = {
18*4882a593Smuzhiyun 	[sys_clk]	=	122880000,
19*4882a593Smuzhiyun 	[alt_core_clk]	=	125000000,
20*4882a593Smuzhiyun 	[pa_clk]	=	122880000,
21*4882a593Smuzhiyun 	[tetris_clk]	=	125000000,
22*4882a593Smuzhiyun 	[ddr3a_clk]	=	100000000,
23*4882a593Smuzhiyun 	[ddr3b_clk]	=	100000000,
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun 
get_external_clk(u32 clk)26*4882a593Smuzhiyun unsigned int get_external_clk(u32 clk)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	unsigned int clk_freq;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	switch (clk) {
31*4882a593Smuzhiyun 	case sys_clk:
32*4882a593Smuzhiyun 		clk_freq = 122880000;
33*4882a593Smuzhiyun 		break;
34*4882a593Smuzhiyun 	case alt_core_clk:
35*4882a593Smuzhiyun 		clk_freq = 125000000;
36*4882a593Smuzhiyun 		break;
37*4882a593Smuzhiyun 	case pa_clk:
38*4882a593Smuzhiyun 		clk_freq = 122880000;
39*4882a593Smuzhiyun 		break;
40*4882a593Smuzhiyun 	case tetris_clk:
41*4882a593Smuzhiyun 		clk_freq = 125000000;
42*4882a593Smuzhiyun 		break;
43*4882a593Smuzhiyun 	case ddr3a_clk:
44*4882a593Smuzhiyun 		clk_freq = 100000000;
45*4882a593Smuzhiyun 		break;
46*4882a593Smuzhiyun 	case ddr3b_clk:
47*4882a593Smuzhiyun 		clk_freq = 100000000;
48*4882a593Smuzhiyun 		break;
49*4882a593Smuzhiyun 	default:
50*4882a593Smuzhiyun 		clk_freq = 0;
51*4882a593Smuzhiyun 		break;
52*4882a593Smuzhiyun 	}
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	return clk_freq;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun static struct pll_init_data core_pll_config[NUM_SPDS] = {
58*4882a593Smuzhiyun 	[SPD800]	= CORE_PLL_799,
59*4882a593Smuzhiyun 	[SPD1000]	= CORE_PLL_999,
60*4882a593Smuzhiyun 	[SPD1200]	= CORE_PLL_1200,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun s16 divn_val[16] = {
64*4882a593Smuzhiyun 	0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static struct pll_init_data tetris_pll_config[] = {
68*4882a593Smuzhiyun 	[SPD800]	= TETRIS_PLL_800,
69*4882a593Smuzhiyun 	[SPD1000]	= TETRIS_PLL_1000,
70*4882a593Smuzhiyun 	[SPD1200]	= TETRIS_PLL_1200,
71*4882a593Smuzhiyun 	[SPD1350]	= TETRIS_PLL_1350,
72*4882a593Smuzhiyun 	[SPD1400]	= TETRIS_PLL_1400,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun static struct pll_init_data pa_pll_config =
76*4882a593Smuzhiyun 	PASS_PLL_983;
77*4882a593Smuzhiyun 
get_pll_init_data(int pll)78*4882a593Smuzhiyun struct pll_init_data *get_pll_init_data(int pll)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	int speed;
81*4882a593Smuzhiyun 	struct pll_init_data *data;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	switch (pll) {
84*4882a593Smuzhiyun 	case MAIN_PLL:
85*4882a593Smuzhiyun 		speed = get_max_dev_speed(speeds);
86*4882a593Smuzhiyun 		data = &core_pll_config[speed];
87*4882a593Smuzhiyun 		break;
88*4882a593Smuzhiyun 	case TETRIS_PLL:
89*4882a593Smuzhiyun 		speed = get_max_arm_speed(speeds);
90*4882a593Smuzhiyun 		data = &tetris_pll_config[speed];
91*4882a593Smuzhiyun 		break;
92*4882a593Smuzhiyun 	case PASS_PLL:
93*4882a593Smuzhiyun 		data = &pa_pll_config;
94*4882a593Smuzhiyun 		break;
95*4882a593Smuzhiyun 	default:
96*4882a593Smuzhiyun 		data = NULL;
97*4882a593Smuzhiyun 	}
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	return data;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
103*4882a593Smuzhiyun struct eth_priv_t eth_priv_cfg[] = {
104*4882a593Smuzhiyun 	{
105*4882a593Smuzhiyun 		.int_name	= "K2HK_EMAC",
106*4882a593Smuzhiyun 		.rx_flow	= 22,
107*4882a593Smuzhiyun 		.phy_addr	= 0,
108*4882a593Smuzhiyun 		.slave_port	= 1,
109*4882a593Smuzhiyun 		.sgmii_link_type = SGMII_LINK_MAC_PHY,
110*4882a593Smuzhiyun 		.phy_if          = PHY_INTERFACE_MODE_SGMII,
111*4882a593Smuzhiyun 	},
112*4882a593Smuzhiyun 	{
113*4882a593Smuzhiyun 		.int_name	= "K2HK_EMAC1",
114*4882a593Smuzhiyun 		.rx_flow	= 23,
115*4882a593Smuzhiyun 		.phy_addr	= 1,
116*4882a593Smuzhiyun 		.slave_port	= 2,
117*4882a593Smuzhiyun 		.sgmii_link_type = SGMII_LINK_MAC_PHY,
118*4882a593Smuzhiyun 		.phy_if          = PHY_INTERFACE_MODE_SGMII,
119*4882a593Smuzhiyun 	},
120*4882a593Smuzhiyun 	{
121*4882a593Smuzhiyun 		.int_name	= "K2HK_EMAC2",
122*4882a593Smuzhiyun 		.rx_flow	= 24,
123*4882a593Smuzhiyun 		.phy_addr	= 2,
124*4882a593Smuzhiyun 		.slave_port	= 3,
125*4882a593Smuzhiyun 		.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
126*4882a593Smuzhiyun 		.phy_if          = PHY_INTERFACE_MODE_SGMII,
127*4882a593Smuzhiyun 	},
128*4882a593Smuzhiyun 	{
129*4882a593Smuzhiyun 		.int_name	= "K2HK_EMAC3",
130*4882a593Smuzhiyun 		.rx_flow	= 25,
131*4882a593Smuzhiyun 		.phy_addr	= 3,
132*4882a593Smuzhiyun 		.slave_port	= 4,
133*4882a593Smuzhiyun 		.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
134*4882a593Smuzhiyun 		.phy_if          = PHY_INTERFACE_MODE_SGMII,
135*4882a593Smuzhiyun 	},
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
get_num_eth_ports(void)138*4882a593Smuzhiyun int get_num_eth_ports(void)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun #endif
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #ifdef CONFIG_BOARD_EARLY_INIT_F
board_early_init_f(void)145*4882a593Smuzhiyun int board_early_init_f(void)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	init_plls();
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return 0;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun #endif
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #if defined(CONFIG_MULTI_DTB_FIT)
board_fit_config_name_match(const char * name)154*4882a593Smuzhiyun int board_fit_config_name_match(const char *name)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	if (!strcmp(name, "keystone-k2hk-evm"))
157*4882a593Smuzhiyun 		return 0;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	return -1;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun #endif
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
spl_init_keystone_plls(void)164*4882a593Smuzhiyun void spl_init_keystone_plls(void)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	init_plls();
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun #endif
169