1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2013 3*4882a593Smuzhiyun * Texas Instruments Incorporated, <www.ti.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Sricharan R <r.sricharan@ti.com> 6*4882a593Smuzhiyun * Nishant Kamat <nskamat@ti.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef _MUX_DATA_DRA7XX_H_ 11*4882a593Smuzhiyun #define _MUX_DATA_DRA7XX_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <asm/arch/mux_dra7xx.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun const struct pad_conf_entry dra72x_core_padconf_array_common[] = { 16*4882a593Smuzhiyun {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ 17*4882a593Smuzhiyun {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ 18*4882a593Smuzhiyun {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ 19*4882a593Smuzhiyun {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ 20*4882a593Smuzhiyun {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ 21*4882a593Smuzhiyun {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ 22*4882a593Smuzhiyun {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ 23*4882a593Smuzhiyun {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ 24*4882a593Smuzhiyun {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ 25*4882a593Smuzhiyun {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ 26*4882a593Smuzhiyun {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ 27*4882a593Smuzhiyun {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ 28*4882a593Smuzhiyun {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ 29*4882a593Smuzhiyun {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ 30*4882a593Smuzhiyun {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ 31*4882a593Smuzhiyun {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ 32*4882a593Smuzhiyun {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ 33*4882a593Smuzhiyun {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ 34*4882a593Smuzhiyun {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ 35*4882a593Smuzhiyun {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ 36*4882a593Smuzhiyun {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ 37*4882a593Smuzhiyun {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ 38*4882a593Smuzhiyun {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ 39*4882a593Smuzhiyun {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ 40*4882a593Smuzhiyun {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ 41*4882a593Smuzhiyun {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ 42*4882a593Smuzhiyun {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ 43*4882a593Smuzhiyun {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ 44*4882a593Smuzhiyun {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 45*4882a593Smuzhiyun {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 46*4882a593Smuzhiyun {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 47*4882a593Smuzhiyun {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 48*4882a593Smuzhiyun {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 49*4882a593Smuzhiyun {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 50*4882a593Smuzhiyun {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 51*4882a593Smuzhiyun {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 52*4882a593Smuzhiyun {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 53*4882a593Smuzhiyun {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 54*4882a593Smuzhiyun {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 55*4882a593Smuzhiyun {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 56*4882a593Smuzhiyun {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 57*4882a593Smuzhiyun {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 58*4882a593Smuzhiyun {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 59*4882a593Smuzhiyun {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 60*4882a593Smuzhiyun {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 61*4882a593Smuzhiyun {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ 62*4882a593Smuzhiyun {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_clk0.vin2a_clk0 */ 63*4882a593Smuzhiyun {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_hsync0.vin2a_hsync0 */ 64*4882a593Smuzhiyun {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_vsync0.vin2a_vsync0 */ 65*4882a593Smuzhiyun {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */ 66*4882a593Smuzhiyun {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */ 67*4882a593Smuzhiyun {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */ 68*4882a593Smuzhiyun {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d3.vin2a_d3 */ 69*4882a593Smuzhiyun {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d4.vin2a_d4 */ 70*4882a593Smuzhiyun {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d5.vin2a_d5 */ 71*4882a593Smuzhiyun {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d6.vin2a_d6 */ 72*4882a593Smuzhiyun {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d7.vin2a_d7 */ 73*4882a593Smuzhiyun {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d8.vin2a_d8 */ 74*4882a593Smuzhiyun {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d9.vin2a_d9 */ 75*4882a593Smuzhiyun {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */ 76*4882a593Smuzhiyun {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */ 77*4882a593Smuzhiyun {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ 78*4882a593Smuzhiyun {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ 79*4882a593Smuzhiyun {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 80*4882a593Smuzhiyun {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ 81*4882a593Smuzhiyun {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ 82*4882a593Smuzhiyun {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ 83*4882a593Smuzhiyun {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ 84*4882a593Smuzhiyun {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ 85*4882a593Smuzhiyun {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ 86*4882a593Smuzhiyun {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ 87*4882a593Smuzhiyun {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ 88*4882a593Smuzhiyun {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ 89*4882a593Smuzhiyun {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ 90*4882a593Smuzhiyun {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ 91*4882a593Smuzhiyun {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ 92*4882a593Smuzhiyun {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ 93*4882a593Smuzhiyun {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ 94*4882a593Smuzhiyun {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ 95*4882a593Smuzhiyun {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ 96*4882a593Smuzhiyun {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ 97*4882a593Smuzhiyun {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ 98*4882a593Smuzhiyun {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ 99*4882a593Smuzhiyun {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ 100*4882a593Smuzhiyun {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ 101*4882a593Smuzhiyun {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ 102*4882a593Smuzhiyun {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ 103*4882a593Smuzhiyun {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ 104*4882a593Smuzhiyun {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ 105*4882a593Smuzhiyun {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 106*4882a593Smuzhiyun {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ 107*4882a593Smuzhiyun {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ 108*4882a593Smuzhiyun {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ 109*4882a593Smuzhiyun {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ 110*4882a593Smuzhiyun {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ 111*4882a593Smuzhiyun {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 112*4882a593Smuzhiyun {MCASP1_AXR0, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr0.i2c5_sda */ 113*4882a593Smuzhiyun {MCASP1_AXR1, (M10 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.i2c5_scl */ 114*4882a593Smuzhiyun {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 115*4882a593Smuzhiyun {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 116*4882a593Smuzhiyun {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 117*4882a593Smuzhiyun {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 118*4882a593Smuzhiyun {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 119*4882a593Smuzhiyun {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 120*4882a593Smuzhiyun {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 121*4882a593Smuzhiyun {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ 122*4882a593Smuzhiyun {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 123*4882a593Smuzhiyun {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 124*4882a593Smuzhiyun {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ 125*4882a593Smuzhiyun {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 126*4882a593Smuzhiyun {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 127*4882a593Smuzhiyun {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 128*4882a593Smuzhiyun {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ 129*4882a593Smuzhiyun {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 130*4882a593Smuzhiyun {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 131*4882a593Smuzhiyun {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 132*4882a593Smuzhiyun {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 133*4882a593Smuzhiyun {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 134*4882a593Smuzhiyun {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 135*4882a593Smuzhiyun {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ 136*4882a593Smuzhiyun {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ 137*4882a593Smuzhiyun {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ 138*4882a593Smuzhiyun {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ 139*4882a593Smuzhiyun {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ 140*4882a593Smuzhiyun {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ 141*4882a593Smuzhiyun {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 142*4882a593Smuzhiyun {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ 143*4882a593Smuzhiyun {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 144*4882a593Smuzhiyun {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ 145*4882a593Smuzhiyun {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ 146*4882a593Smuzhiyun {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ 147*4882a593Smuzhiyun {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ 148*4882a593Smuzhiyun {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 149*4882a593Smuzhiyun {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ 150*4882a593Smuzhiyun {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 151*4882a593Smuzhiyun {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 152*4882a593Smuzhiyun {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ 153*4882a593Smuzhiyun {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ 154*4882a593Smuzhiyun {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rxd.mmc4_dat0 */ 155*4882a593Smuzhiyun {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ 156*4882a593Smuzhiyun {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ 157*4882a593Smuzhiyun {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ 158*4882a593Smuzhiyun {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 159*4882a593Smuzhiyun {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 160*4882a593Smuzhiyun {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ 161*4882a593Smuzhiyun {WAKEUP3, (M1 | PULL_ENA | PULL_UP)}, /* Wakeup3.sys_nirq1 */ 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun const struct pad_conf_entry dra72x_rgmii_padconf_array_revb[] = { 165*4882a593Smuzhiyun {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 166*4882a593Smuzhiyun {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 167*4882a593Smuzhiyun {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 168*4882a593Smuzhiyun {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 169*4882a593Smuzhiyun {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 170*4882a593Smuzhiyun {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 171*4882a593Smuzhiyun {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 172*4882a593Smuzhiyun {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 173*4882a593Smuzhiyun {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 174*4882a593Smuzhiyun {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 175*4882a593Smuzhiyun {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 176*4882a593Smuzhiyun {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 177*4882a593Smuzhiyun {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 178*4882a593Smuzhiyun {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d0.rgmii1_txc */ 179*4882a593Smuzhiyun {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d1.rgmii1_txctl */ 180*4882a593Smuzhiyun {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d2.rgmii1_txd3 */ 181*4882a593Smuzhiyun {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d3.rgmii1_txd2 */ 182*4882a593Smuzhiyun {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d4.rgmii1_txd1 */ 183*4882a593Smuzhiyun {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d5.rgmii1_txd0 */ 184*4882a593Smuzhiyun {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d6.rgmii1_rxc */ 185*4882a593Smuzhiyun {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d7.rgmii1_rxctl */ 186*4882a593Smuzhiyun {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d8.rgmii1_rxd3 */ 187*4882a593Smuzhiyun {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d9.rgmii1_rxd2 */ 188*4882a593Smuzhiyun {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d10.rgmii1_rxd1 */ 189*4882a593Smuzhiyun {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d11.rgmii1_rxd0 */ 190*4882a593Smuzhiyun {XREF_CLK1, (M5 | PIN_OUTPUT)}, /* xref_clk1.atl_clk1 */ 191*4882a593Smuzhiyun {XREF_CLK2, (M5 | PIN_OUTPUT)}, /* xref_clk2.atl_clk2 */ 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun const struct pad_conf_entry dra72x_rgmii_padconf_array_revc[] = { 195*4882a593Smuzhiyun {VIN2A_FLD0, (M14 | PIN_INPUT)}, /* vin2a_fld0.gpio3_30 */ 196*4882a593Smuzhiyun {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 197*4882a593Smuzhiyun {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 198*4882a593Smuzhiyun {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 199*4882a593Smuzhiyun {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 200*4882a593Smuzhiyun {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 201*4882a593Smuzhiyun {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 202*4882a593Smuzhiyun {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 203*4882a593Smuzhiyun {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 204*4882a593Smuzhiyun {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 205*4882a593Smuzhiyun {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 206*4882a593Smuzhiyun {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 207*4882a593Smuzhiyun {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 208*4882a593Smuzhiyun {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 209*4882a593Smuzhiyun {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 210*4882a593Smuzhiyun {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 211*4882a593Smuzhiyun {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 212*4882a593Smuzhiyun {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 213*4882a593Smuzhiyun {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 214*4882a593Smuzhiyun {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 215*4882a593Smuzhiyun {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 216*4882a593Smuzhiyun {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 217*4882a593Smuzhiyun {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 218*4882a593Smuzhiyun {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 219*4882a593Smuzhiyun {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 220*4882a593Smuzhiyun {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun const struct pad_conf_entry dra71x_core_padconf_array[] = { 224*4882a593Smuzhiyun {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ 225*4882a593Smuzhiyun {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ 226*4882a593Smuzhiyun {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ 227*4882a593Smuzhiyun {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ 228*4882a593Smuzhiyun {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ 229*4882a593Smuzhiyun {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ 230*4882a593Smuzhiyun {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ 231*4882a593Smuzhiyun {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ 232*4882a593Smuzhiyun {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ 233*4882a593Smuzhiyun {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ 234*4882a593Smuzhiyun {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ 235*4882a593Smuzhiyun {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ 236*4882a593Smuzhiyun {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ 237*4882a593Smuzhiyun {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ 238*4882a593Smuzhiyun {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ 239*4882a593Smuzhiyun {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ 240*4882a593Smuzhiyun {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ 241*4882a593Smuzhiyun {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ 242*4882a593Smuzhiyun {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ 243*4882a593Smuzhiyun {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ 244*4882a593Smuzhiyun {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ 245*4882a593Smuzhiyun {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ 246*4882a593Smuzhiyun {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ 247*4882a593Smuzhiyun {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ 248*4882a593Smuzhiyun {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ 249*4882a593Smuzhiyun {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ 250*4882a593Smuzhiyun {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ 251*4882a593Smuzhiyun {GPMC_A11, (M14 | PIN_INPUT)}, /* gpmc_a11.gpio2_1 */ 252*4882a593Smuzhiyun {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 253*4882a593Smuzhiyun {GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 254*4882a593Smuzhiyun {GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 255*4882a593Smuzhiyun {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 256*4882a593Smuzhiyun {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 257*4882a593Smuzhiyun {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 258*4882a593Smuzhiyun {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 259*4882a593Smuzhiyun {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 260*4882a593Smuzhiyun {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 261*4882a593Smuzhiyun {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 262*4882a593Smuzhiyun {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 263*4882a593Smuzhiyun {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 264*4882a593Smuzhiyun {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 265*4882a593Smuzhiyun {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 266*4882a593Smuzhiyun {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 267*4882a593Smuzhiyun {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 268*4882a593Smuzhiyun {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 269*4882a593Smuzhiyun {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ 270*4882a593Smuzhiyun {VIN2A_CLK0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_clk0.vin2a_clk0 */ 271*4882a593Smuzhiyun {VIN2A_FLD0, (M14 | PIN_INPUT)}, /* vin2a_fld0.gpio3_30 */ 272*4882a593Smuzhiyun {VIN2A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_hsync0.vin2a_hsync0 */ 273*4882a593Smuzhiyun {VIN2A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE9)}, /* vin2a_vsync0.vin2a_vsync0 */ 274*4882a593Smuzhiyun {VIN2A_D0, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d0.vin2a_d0 */ 275*4882a593Smuzhiyun {VIN2A_D1, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d1.vin2a_d1 */ 276*4882a593Smuzhiyun {VIN2A_D2, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)}, /* vin2a_d2.vin2a_d2 */ 277*4882a593Smuzhiyun {VIN2A_D3, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d3.vin2a_d3 */ 278*4882a593Smuzhiyun {VIN2A_D4, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d4.vin2a_d4 */ 279*4882a593Smuzhiyun {VIN2A_D5, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE8)}, /* vin2a_d5.vin2a_d5 */ 280*4882a593Smuzhiyun {VIN2A_D6, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d6.vin2a_d6 */ 281*4882a593Smuzhiyun {VIN2A_D7, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE6)}, /* vin2a_d7.vin2a_d7 */ 282*4882a593Smuzhiyun {VIN2A_D8, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d8.vin2a_d8 */ 283*4882a593Smuzhiyun {VIN2A_D9, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE2)}, /* vin2a_d9.vin2a_d9 */ 284*4882a593Smuzhiyun {VIN2A_D10, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d10.vin2a_d10 */ 285*4882a593Smuzhiyun {VIN2A_D11, (M0 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE5)}, /* vin2a_d11.vin2a_d11 */ 286*4882a593Smuzhiyun {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 287*4882a593Smuzhiyun {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 288*4882a593Smuzhiyun {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 289*4882a593Smuzhiyun {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 290*4882a593Smuzhiyun {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 291*4882a593Smuzhiyun {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 292*4882a593Smuzhiyun {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 293*4882a593Smuzhiyun {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 294*4882a593Smuzhiyun {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 295*4882a593Smuzhiyun {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 296*4882a593Smuzhiyun {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 297*4882a593Smuzhiyun {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 298*4882a593Smuzhiyun {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* N/A.N/A */ 299*4882a593Smuzhiyun {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* N/A.N/A */ 300*4882a593Smuzhiyun {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* N/A.N/A */ 301*4882a593Smuzhiyun {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 302*4882a593Smuzhiyun {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ 303*4882a593Smuzhiyun {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 304*4882a593Smuzhiyun {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 305*4882a593Smuzhiyun {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 306*4882a593Smuzhiyun {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 307*4882a593Smuzhiyun {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 308*4882a593Smuzhiyun {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 309*4882a593Smuzhiyun {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 310*4882a593Smuzhiyun {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 311*4882a593Smuzhiyun {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 312*4882a593Smuzhiyun {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 313*4882a593Smuzhiyun {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 314*4882a593Smuzhiyun {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 315*4882a593Smuzhiyun {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ 316*4882a593Smuzhiyun {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ 317*4882a593Smuzhiyun {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ 318*4882a593Smuzhiyun {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ 319*4882a593Smuzhiyun {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 320*4882a593Smuzhiyun {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ 321*4882a593Smuzhiyun {MCASP1_ACLKX, (M14 | PIN_INPUT)}, /* mcasp1_aclkx.gpio7_31 */ 322*4882a593Smuzhiyun {MCASP1_FSX, (M14 | 0x000d0000)}, /* mcasp1_fsx.gpio7_30 */ 323*4882a593Smuzhiyun {MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.i2c5_sda */ 324*4882a593Smuzhiyun {MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.i2c5_scl */ 325*4882a593Smuzhiyun {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 326*4882a593Smuzhiyun {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 327*4882a593Smuzhiyun {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 328*4882a593Smuzhiyun {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 329*4882a593Smuzhiyun {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 330*4882a593Smuzhiyun {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 331*4882a593Smuzhiyun {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 332*4882a593Smuzhiyun {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ 333*4882a593Smuzhiyun {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 334*4882a593Smuzhiyun {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 335*4882a593Smuzhiyun {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 336*4882a593Smuzhiyun {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 337*4882a593Smuzhiyun {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 338*4882a593Smuzhiyun {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ 339*4882a593Smuzhiyun {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 340*4882a593Smuzhiyun {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 341*4882a593Smuzhiyun {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 342*4882a593Smuzhiyun {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 343*4882a593Smuzhiyun {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 344*4882a593Smuzhiyun {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 345*4882a593Smuzhiyun {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 346*4882a593Smuzhiyun {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ 347*4882a593Smuzhiyun {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ 348*4882a593Smuzhiyun {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ 349*4882a593Smuzhiyun {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ 350*4882a593Smuzhiyun {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ 351*4882a593Smuzhiyun {SPI1_CS1, (M14 | PIN_INPUT_PULLUP)}, /* spi1_cs1.gpio7_11 */ 352*4882a593Smuzhiyun {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ 353*4882a593Smuzhiyun {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 354*4882a593Smuzhiyun {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ 355*4882a593Smuzhiyun {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ 356*4882a593Smuzhiyun {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ 357*4882a593Smuzhiyun {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ 358*4882a593Smuzhiyun {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 359*4882a593Smuzhiyun {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ 360*4882a593Smuzhiyun {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 361*4882a593Smuzhiyun {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 362*4882a593Smuzhiyun {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ 363*4882a593Smuzhiyun {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ 364*4882a593Smuzhiyun {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rxd.mmc4_dat0 */ 365*4882a593Smuzhiyun {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ 366*4882a593Smuzhiyun {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ 367*4882a593Smuzhiyun {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ 368*4882a593Smuzhiyun {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 369*4882a593Smuzhiyun {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 370*4882a593Smuzhiyun {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ 371*4882a593Smuzhiyun {WAKEUP3, (M1 | PULL_ENA | PULL_UP)}, /* Wakeup3.sys_nirq1 */ 372*4882a593Smuzhiyun }; 373*4882a593Smuzhiyun 374*4882a593Smuzhiyun const struct pad_conf_entry early_padconf[] = { 375*4882a593Smuzhiyun #if (CONFIG_CONS_INDEX == 1) 376*4882a593Smuzhiyun {UART1_RXD, (PIN_INPUT_SLEW | M0)}, /* UART1_RXD */ 377*4882a593Smuzhiyun {UART1_TXD, (PIN_INPUT_SLEW | M0)}, /* UART1_TXD */ 378*4882a593Smuzhiyun #elif (CONFIG_CONS_INDEX == 3) 379*4882a593Smuzhiyun {UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */ 380*4882a593Smuzhiyun {UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */ 381*4882a593Smuzhiyun #endif 382*4882a593Smuzhiyun {I2C1_SDA, (PIN_INPUT | M0)}, /* I2C1_SDA */ 383*4882a593Smuzhiyun {I2C1_SCL, (PIN_INPUT | M0)}, /* I2C1_SCL */ 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun #ifdef CONFIG_IODELAY_RECALIBRATION 387*4882a593Smuzhiyun const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revb[] = { 388*4882a593Smuzhiyun {0x6F0, 359, 0}, /* RGMMI0_RXC_IN */ 389*4882a593Smuzhiyun {0x6FC, 129, 1896}, /* RGMMI0_RXCTL_IN */ 390*4882a593Smuzhiyun {0x708, 80, 1391}, /* RGMMI0_RXD0_IN */ 391*4882a593Smuzhiyun {0x714, 196, 1522}, /* RGMMI0_RXD1_IN */ 392*4882a593Smuzhiyun {0x720, 40, 1860}, /* RGMMI0_RXD2_IN */ 393*4882a593Smuzhiyun {0x72C, 0, 1956}, /* RGMMI0_RXD3_IN */ 394*4882a593Smuzhiyun {0x740, 0, 220}, /* RGMMI0_TXC_OUT */ 395*4882a593Smuzhiyun {0x74C, 1820, 180}, /* RGMMI0_TXCTL_OUT */ 396*4882a593Smuzhiyun {0x758, 1740, 440}, /* RGMMI0_TXD0_OUT */ 397*4882a593Smuzhiyun {0x764, 1740, 240}, /* RGMMI0_TXD1_OUT */ 398*4882a593Smuzhiyun {0x770, 1680, 380}, /* RGMMI0_TXD2_OUT */ 399*4882a593Smuzhiyun {0x77C, 1740, 440}, /* RGMMI0_TXD3_OUT */ 400*4882a593Smuzhiyun /* These values are for using RGMII1 configuration on VIN2a_x pins. */ 401*4882a593Smuzhiyun {0xAB0, 596, 0}, /* CFG_VIN2A_D18_IN */ 402*4882a593Smuzhiyun {0xABC, 314, 980}, /* CFG_VIN2A_D19_IN */ 403*4882a593Smuzhiyun {0xAD4, 241, 1536}, /* CFG_VIN2A_D20_IN */ 404*4882a593Smuzhiyun {0xAE0, 103, 1689}, /* CFG_VIN2A_D21_IN */ 405*4882a593Smuzhiyun {0xAEC, 161, 1563}, /* CFG_VIN2A_D22_IN */ 406*4882a593Smuzhiyun {0xAF8, 0, 1613}, /* CFG_VIN2A_D23_IN */ 407*4882a593Smuzhiyun {0xA70, 0, 200}, /* CFG_VIN2A_D12_OUT */ 408*4882a593Smuzhiyun {0xA7C, 1560, 140}, /* CFG_VIN2A_D13_OUT */ 409*4882a593Smuzhiyun {0xA88, 1700, 0}, /* CFG_VIN2A_D14_OUT */ 410*4882a593Smuzhiyun {0xA94, 1260, 0}, /* CFG_VIN2A_D15_OUT */ 411*4882a593Smuzhiyun {0xAA0, 1400, 0}, /* CFG_VIN2A_D16_OUT */ 412*4882a593Smuzhiyun {0xAAC, 1290, 0}, /* CFG_VIN2A_D17_OUT */ 413*4882a593Smuzhiyun {0x144, 0, 0}, /* CFG_GPMC_A13_IN */ 414*4882a593Smuzhiyun {0x150, 2062, 2277}, /* CFG_GPMC_A14_IN */ 415*4882a593Smuzhiyun {0x15C, 1960, 2289}, /* CFG_GPMC_A15_IN */ 416*4882a593Smuzhiyun {0x168, 2058, 2386}, /* CFG_GPMC_A16_IN */ 417*4882a593Smuzhiyun {0x170, 0, 0 }, /* CFG_GPMC_A16_OUT */ 418*4882a593Smuzhiyun {0x174, 2062, 2350}, /* CFG_GPMC_A17_IN */ 419*4882a593Smuzhiyun {0x188, 0, 0}, /* CFG_GPMC_A18_OUT */ 420*4882a593Smuzhiyun {0x374, 121, 0}, /* CFG_GPMC_CS2_OUT */ 421*4882a593Smuzhiyun }; 422*4882a593Smuzhiyun 423*4882a593Smuzhiyun const struct iodelay_cfg_entry dra72_iodelay_cfg_array_revc[] = { 424*4882a593Smuzhiyun {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 425*4882a593Smuzhiyun {0x0150, 2247, 1186}, /* CFG_GPMC_A14_IN */ 426*4882a593Smuzhiyun {0x015C, 2176, 1197}, /* CFG_GPMC_A15_IN */ 427*4882a593Smuzhiyun {0x0168, 2229, 1268}, /* CFG_GPMC_A16_IN */ 428*4882a593Smuzhiyun {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 429*4882a593Smuzhiyun {0x0174, 2251, 1217}, /* CFG_GPMC_A17_IN */ 430*4882a593Smuzhiyun {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 431*4882a593Smuzhiyun {0x0374, 121, 0}, /* CFG_GPMC_CS2_OUT */ 432*4882a593Smuzhiyun {0x06F0, 413, 0}, /* CFG_RGMII0_RXC_IN */ 433*4882a593Smuzhiyun {0x06FC, 27, 2296}, /* CFG_RGMII0_RXCTL_IN */ 434*4882a593Smuzhiyun {0x0708, 3, 1721}, /* CFG_RGMII0_RXD0_IN */ 435*4882a593Smuzhiyun {0x0714, 134, 1786}, /* CFG_RGMII0_RXD1_IN */ 436*4882a593Smuzhiyun {0x0720, 40, 1966}, /* CFG_RGMII0_RXD2_IN */ 437*4882a593Smuzhiyun {0x072C, 0, 2057}, /* CFG_RGMII0_RXD3_IN */ 438*4882a593Smuzhiyun {0x0740, 0, 60}, /* CFG_RGMII0_TXC_OUT */ 439*4882a593Smuzhiyun {0x074C, 0, 60}, /* CFG_RGMII0_TXCTL_OUT */ 440*4882a593Smuzhiyun {0x0758, 0, 60}, /* CFG_RGMII0_TXD0_OUT */ 441*4882a593Smuzhiyun {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ 442*4882a593Smuzhiyun {0x0770, 0, 60}, /* CFG_RGMII0_TXD2_OUT */ 443*4882a593Smuzhiyun {0x077C, 0, 120}, /* CFG_RGMII0_TXD3_OUT */ 444*4882a593Smuzhiyun {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 445*4882a593Smuzhiyun {0x0A7C, 170, 0}, /* CFG_VIN2A_D13_OUT */ 446*4882a593Smuzhiyun {0x0A88, 150, 0}, /* CFG_VIN2A_D14_OUT */ 447*4882a593Smuzhiyun {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 448*4882a593Smuzhiyun {0x0AA0, 60, 0}, /* CFG_VIN2A_D16_OUT */ 449*4882a593Smuzhiyun {0x0AAC, 60, 0}, /* CFG_VIN2A_D17_OUT */ 450*4882a593Smuzhiyun {0x0AB0, 530, 0}, /* CFG_VIN2A_D18_IN */ 451*4882a593Smuzhiyun {0x0ABC, 71, 1099}, /* CFG_VIN2A_D19_IN */ 452*4882a593Smuzhiyun {0x0AC8, 2229, 10}, /* CFG_VIN2A_D1_IN */ 453*4882a593Smuzhiyun {0x0AD4, 142, 1337}, /* CFG_VIN2A_D20_IN */ 454*4882a593Smuzhiyun {0x0AE0, 114, 1517}, /* CFG_VIN2A_D21_IN */ 455*4882a593Smuzhiyun {0x0AEC, 171, 1331}, /* CFG_VIN2A_D22_IN */ 456*4882a593Smuzhiyun {0x0AF8, 0, 1328}, /* CFG_VIN2A_D23_IN */ 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun const struct iodelay_cfg_entry dra71_iodelay_cfg_array[] = { 460*4882a593Smuzhiyun {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 461*4882a593Smuzhiyun {0x0150, 2247, 1186}, /* CFG_GPMC_A14_IN */ 462*4882a593Smuzhiyun {0x015C, 2176, 1197}, /* CFG_GPMC_A15_IN */ 463*4882a593Smuzhiyun {0x0168, 2229, 1268}, /* CFG_GPMC_A16_IN */ 464*4882a593Smuzhiyun {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 465*4882a593Smuzhiyun {0x0174, 2251, 1217}, /* CFG_GPMC_A17_IN */ 466*4882a593Smuzhiyun {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 467*4882a593Smuzhiyun {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 468*4882a593Smuzhiyun {0x06F0, 413, 0}, /* CFG_RGMII0_RXC_IN */ 469*4882a593Smuzhiyun {0x06FC, 27, 2296}, /* CFG_RGMII0_RXCTL_IN */ 470*4882a593Smuzhiyun {0x0708, 3, 1721}, /* CFG_RGMII0_RXD0_IN */ 471*4882a593Smuzhiyun {0x0714, 134, 1786}, /* CFG_RGMII0_RXD1_IN */ 472*4882a593Smuzhiyun {0x0720, 40, 1966}, /* CFG_RGMII0_RXD2_IN */ 473*4882a593Smuzhiyun {0x072C, 0, 2057}, /* CFG_RGMII0_RXD3_IN */ 474*4882a593Smuzhiyun {0x0740, 0, 60}, /* CFG_RGMII0_TXC_OUT */ 475*4882a593Smuzhiyun {0x074C, 0, 60}, /* CFG_RGMII0_TXCTL_OUT */ 476*4882a593Smuzhiyun {0x0758, 0, 60}, /* CFG_RGMII0_TXD0_OUT */ 477*4882a593Smuzhiyun {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ 478*4882a593Smuzhiyun {0x0770, 0, 60}, /* CFG_RGMII0_TXD2_OUT */ 479*4882a593Smuzhiyun {0x077C, 0, 120}, /* CFG_RGMII0_TXD3_OUT */ 480*4882a593Smuzhiyun {0x0A38, 0, 0}, /* CFG_VIN2A_CLK0_IN */ 481*4882a593Smuzhiyun {0x0A44, 1936, 0}, /* CFG_VIN2A_D0_IN */ 482*4882a593Smuzhiyun {0x0A50, 2031, 0}, /* CFG_VIN2A_D10_IN */ 483*4882a593Smuzhiyun {0x0A5C, 1702, 0}, /* CFG_VIN2A_D11_IN */ 484*4882a593Smuzhiyun {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 485*4882a593Smuzhiyun {0x0A7C, 170, 0}, /* CFG_VIN2A_D13_OUT */ 486*4882a593Smuzhiyun {0x0A88, 150, 0}, /* CFG_VIN2A_D14_OUT */ 487*4882a593Smuzhiyun {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 488*4882a593Smuzhiyun {0x0AA0, 60, 0}, /* CFG_VIN2A_D16_OUT */ 489*4882a593Smuzhiyun {0x0AAC, 60, 0}, /* CFG_VIN2A_D17_OUT */ 490*4882a593Smuzhiyun {0x0AB0, 530, 0}, /* CFG_VIN2A_D18_IN */ 491*4882a593Smuzhiyun {0x0ABC, 71, 1099}, /* CFG_VIN2A_D19_IN */ 492*4882a593Smuzhiyun {0x0AC8, 2229, 10}, /* CFG_VIN2A_D1_IN */ 493*4882a593Smuzhiyun {0x0AD4, 142, 1337}, /* CFG_VIN2A_D20_IN */ 494*4882a593Smuzhiyun {0x0AE0, 114, 1517}, /* CFG_VIN2A_D21_IN */ 495*4882a593Smuzhiyun {0x0AEC, 171, 1331}, /* CFG_VIN2A_D22_IN */ 496*4882a593Smuzhiyun {0x0AF8, 0, 1328}, /* CFG_VIN2A_D23_IN */ 497*4882a593Smuzhiyun {0x0B04, 1736, 0}, /* CFG_VIN2A_D2_IN */ 498*4882a593Smuzhiyun {0x0B10, 1943, 0}, /* CFG_VIN2A_D3_IN */ 499*4882a593Smuzhiyun {0x0B1C, 1601, 0}, /* CFG_VIN2A_D4_IN */ 500*4882a593Smuzhiyun {0x0B28, 2052, 0}, /* CFG_VIN2A_D5_IN */ 501*4882a593Smuzhiyun {0x0B34, 1571, 0}, /* CFG_VIN2A_D6_IN */ 502*4882a593Smuzhiyun {0x0B40, 1855, 0}, /* CFG_VIN2A_D7_IN */ 503*4882a593Smuzhiyun {0x0B4C, 1224, 618}, /* CFG_VIN2A_D8_IN */ 504*4882a593Smuzhiyun {0x0B58, 1373, 509}, /* CFG_VIN2A_D9_IN */ 505*4882a593Smuzhiyun {0x0B7C, 1943, 0}, /* CFG_VIN2A_HSYNC0_IN */ 506*4882a593Smuzhiyun {0x0B88, 1612, 0}, /* CFG_VIN2A_VSYNC0_IN */ 507*4882a593Smuzhiyun }; 508*4882a593Smuzhiyun #endif 509*4882a593Smuzhiyun 510*4882a593Smuzhiyun const struct pad_conf_entry dra74x_core_padconf_array[] = { 511*4882a593Smuzhiyun {GPMC_AD0, (M3 | PIN_INPUT)}, /* gpmc_ad0.vout3_d0 */ 512*4882a593Smuzhiyun {GPMC_AD1, (M3 | PIN_INPUT)}, /* gpmc_ad1.vout3_d1 */ 513*4882a593Smuzhiyun {GPMC_AD2, (M3 | PIN_INPUT)}, /* gpmc_ad2.vout3_d2 */ 514*4882a593Smuzhiyun {GPMC_AD3, (M3 | PIN_INPUT)}, /* gpmc_ad3.vout3_d3 */ 515*4882a593Smuzhiyun {GPMC_AD4, (M3 | PIN_INPUT)}, /* gpmc_ad4.vout3_d4 */ 516*4882a593Smuzhiyun {GPMC_AD5, (M3 | PIN_INPUT)}, /* gpmc_ad5.vout3_d5 */ 517*4882a593Smuzhiyun {GPMC_AD6, (M3 | PIN_INPUT)}, /* gpmc_ad6.vout3_d6 */ 518*4882a593Smuzhiyun {GPMC_AD7, (M3 | PIN_INPUT)}, /* gpmc_ad7.vout3_d7 */ 519*4882a593Smuzhiyun {GPMC_AD8, (M3 | PIN_INPUT)}, /* gpmc_ad8.vout3_d8 */ 520*4882a593Smuzhiyun {GPMC_AD9, (M3 | PIN_INPUT)}, /* gpmc_ad9.vout3_d9 */ 521*4882a593Smuzhiyun {GPMC_AD10, (M3 | PIN_INPUT)}, /* gpmc_ad10.vout3_d10 */ 522*4882a593Smuzhiyun {GPMC_AD11, (M3 | PIN_INPUT)}, /* gpmc_ad11.vout3_d11 */ 523*4882a593Smuzhiyun {GPMC_AD12, (M3 | PIN_INPUT)}, /* gpmc_ad12.vout3_d12 */ 524*4882a593Smuzhiyun {GPMC_AD13, (M3 | PIN_INPUT)}, /* gpmc_ad13.vout3_d13 */ 525*4882a593Smuzhiyun {GPMC_AD14, (M3 | PIN_INPUT)}, /* gpmc_ad14.vout3_d14 */ 526*4882a593Smuzhiyun {GPMC_AD15, (M3 | PIN_INPUT)}, /* gpmc_ad15.vout3_d15 */ 527*4882a593Smuzhiyun {GPMC_A0, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 */ 528*4882a593Smuzhiyun {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */ 529*4882a593Smuzhiyun {GPMC_A2, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a2.vout3_d18 */ 530*4882a593Smuzhiyun {GPMC_A3, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a3.vout3_d19 */ 531*4882a593Smuzhiyun {GPMC_A4, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a4.vout3_d20 */ 532*4882a593Smuzhiyun {GPMC_A5, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a5.vout3_d21 */ 533*4882a593Smuzhiyun {GPMC_A6, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a6.vout3_d22 */ 534*4882a593Smuzhiyun {GPMC_A7, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a7.vout3_d23 */ 535*4882a593Smuzhiyun {GPMC_A8, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a8.vout3_hsync */ 536*4882a593Smuzhiyun {GPMC_A9, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a9.vout3_vsync */ 537*4882a593Smuzhiyun {GPMC_A10, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a10.vout3_de */ 538*4882a593Smuzhiyun {GPMC_A11, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a11.gpio2_1 */ 539*4882a593Smuzhiyun {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 540*4882a593Smuzhiyun {GPMC_A14, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 541*4882a593Smuzhiyun {GPMC_A15, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 542*4882a593Smuzhiyun {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 543*4882a593Smuzhiyun {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 544*4882a593Smuzhiyun {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 545*4882a593Smuzhiyun {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 546*4882a593Smuzhiyun {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 547*4882a593Smuzhiyun {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 548*4882a593Smuzhiyun {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 549*4882a593Smuzhiyun {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 550*4882a593Smuzhiyun {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 551*4882a593Smuzhiyun {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 552*4882a593Smuzhiyun {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 553*4882a593Smuzhiyun {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 554*4882a593Smuzhiyun {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 555*4882a593Smuzhiyun {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 556*4882a593Smuzhiyun {GPMC_CS3, (M3 | PIN_INPUT_PULLUP)}, /* gpmc_cs3.vout3_clk */ 557*4882a593Smuzhiyun {VIN1A_CLK0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_clk0.vin1a_clk0 */ 558*4882a593Smuzhiyun {VIN1A_DE0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_de0.vin1a_de0 */ 559*4882a593Smuzhiyun {VIN1A_FLD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_fld0.vin1a_fld0 */ 560*4882a593Smuzhiyun {VIN1A_HSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_hsync0.vin1a_hsync0 */ 561*4882a593Smuzhiyun {VIN1A_VSYNC0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_vsync0.vin1a_vsync0 */ 562*4882a593Smuzhiyun {VIN1A_D0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d0.vin1a_d0 */ 563*4882a593Smuzhiyun {VIN1A_D1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d1.vin1a_d1 */ 564*4882a593Smuzhiyun {VIN1A_D2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d2.vin1a_d2 */ 565*4882a593Smuzhiyun {VIN1A_D3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d3.vin1a_d3 */ 566*4882a593Smuzhiyun {VIN1A_D4, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d4.vin1a_d4 */ 567*4882a593Smuzhiyun {VIN1A_D5, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d5.vin1a_d5 */ 568*4882a593Smuzhiyun {VIN1A_D6, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d6.vin1a_d6 */ 569*4882a593Smuzhiyun {VIN1A_D7, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d7.vin1a_d7 */ 570*4882a593Smuzhiyun {VIN1A_D8, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d8.vin1a_d8 */ 571*4882a593Smuzhiyun {VIN1A_D9, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d9.vin1a_d9 */ 572*4882a593Smuzhiyun {VIN1A_D10, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d10.vin1a_d10 */ 573*4882a593Smuzhiyun {VIN1A_D11, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d11.vin1a_d11 */ 574*4882a593Smuzhiyun {VIN1A_D12, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d12.vin1a_d12 */ 575*4882a593Smuzhiyun {VIN1A_D13, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d13.vin1a_d13 */ 576*4882a593Smuzhiyun {VIN1A_D14, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d14.vin1a_d14 */ 577*4882a593Smuzhiyun {VIN1A_D15, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d15.vin1a_d15 */ 578*4882a593Smuzhiyun {VIN1A_D16, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d16.vin1a_d16 */ 579*4882a593Smuzhiyun {VIN1A_D17, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d17.vin1a_d17 */ 580*4882a593Smuzhiyun {VIN1A_D18, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d18.vin1a_d18 */ 581*4882a593Smuzhiyun {VIN1A_D19, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d19.vin1a_d19 */ 582*4882a593Smuzhiyun {VIN1A_D20, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d20.vin1a_d20 */ 583*4882a593Smuzhiyun {VIN1A_D21, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d21.vin1a_d21 */ 584*4882a593Smuzhiyun {VIN1A_D22, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d22.vin1a_d22 */ 585*4882a593Smuzhiyun {VIN1A_D23, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin1a_d23.vin1a_d23 */ 586*4882a593Smuzhiyun {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 587*4882a593Smuzhiyun {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 588*4882a593Smuzhiyun {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 589*4882a593Smuzhiyun {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 590*4882a593Smuzhiyun {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 591*4882a593Smuzhiyun {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 592*4882a593Smuzhiyun {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 593*4882a593Smuzhiyun {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 594*4882a593Smuzhiyun {VIN2A_D20, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 595*4882a593Smuzhiyun {VIN2A_D21, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 596*4882a593Smuzhiyun {VIN2A_D22, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 597*4882a593Smuzhiyun {VIN2A_D23, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 598*4882a593Smuzhiyun {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ 599*4882a593Smuzhiyun {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ 600*4882a593Smuzhiyun {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ 601*4882a593Smuzhiyun {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ 602*4882a593Smuzhiyun {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ 603*4882a593Smuzhiyun {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ 604*4882a593Smuzhiyun {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ 605*4882a593Smuzhiyun {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ 606*4882a593Smuzhiyun {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ 607*4882a593Smuzhiyun {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ 608*4882a593Smuzhiyun {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ 609*4882a593Smuzhiyun {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ 610*4882a593Smuzhiyun {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ 611*4882a593Smuzhiyun {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ 612*4882a593Smuzhiyun {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ 613*4882a593Smuzhiyun {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ 614*4882a593Smuzhiyun {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ 615*4882a593Smuzhiyun {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ 616*4882a593Smuzhiyun {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ 617*4882a593Smuzhiyun {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ 618*4882a593Smuzhiyun {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ 619*4882a593Smuzhiyun {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ 620*4882a593Smuzhiyun {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ 621*4882a593Smuzhiyun {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ 622*4882a593Smuzhiyun {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ 623*4882a593Smuzhiyun {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ 624*4882a593Smuzhiyun {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ 625*4882a593Smuzhiyun {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ 626*4882a593Smuzhiyun {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 627*4882a593Smuzhiyun {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ 628*4882a593Smuzhiyun {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 629*4882a593Smuzhiyun {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 630*4882a593Smuzhiyun {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 631*4882a593Smuzhiyun {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 632*4882a593Smuzhiyun {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 633*4882a593Smuzhiyun {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 634*4882a593Smuzhiyun {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 635*4882a593Smuzhiyun {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 636*4882a593Smuzhiyun {RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 637*4882a593Smuzhiyun {RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 638*4882a593Smuzhiyun {RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 639*4882a593Smuzhiyun {RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 640*4882a593Smuzhiyun {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */ 641*4882a593Smuzhiyun {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */ 642*4882a593Smuzhiyun {GPIO6_14, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_14.i2c3_sda */ 643*4882a593Smuzhiyun {GPIO6_15, (M9 | PIN_INPUT_PULLUP)}, /* gpio6_15.i2c3_scl */ 644*4882a593Smuzhiyun {GPIO6_16, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 645*4882a593Smuzhiyun {XREF_CLK2, (M5 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.atl_clk2 */ 646*4882a593Smuzhiyun {MCASP1_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.mcasp1_aclkx */ 647*4882a593Smuzhiyun {MCASP1_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.mcasp1_fsx */ 648*4882a593Smuzhiyun {MCASP1_AXR0, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE15)}, /* mcasp1_axr0.mcasp1_axr0 */ 649*4882a593Smuzhiyun {MCASP1_AXR1, (M0 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.mcasp1_axr1 */ 650*4882a593Smuzhiyun {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 651*4882a593Smuzhiyun {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 652*4882a593Smuzhiyun {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 653*4882a593Smuzhiyun {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 654*4882a593Smuzhiyun {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 655*4882a593Smuzhiyun {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 656*4882a593Smuzhiyun {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 657*4882a593Smuzhiyun {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.mcasp7_axr1 */ 658*4882a593Smuzhiyun {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 659*4882a593Smuzhiyun {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 660*4882a593Smuzhiyun {MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.mcasp2_aclkr */ 661*4882a593Smuzhiyun {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 662*4882a593Smuzhiyun {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 663*4882a593Smuzhiyun {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 664*4882a593Smuzhiyun {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW | VIRTUAL_MODE6)}, /* mcasp3_axr1.mcasp3_axr1 */ 665*4882a593Smuzhiyun {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 666*4882a593Smuzhiyun {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 667*4882a593Smuzhiyun {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 668*4882a593Smuzhiyun {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 669*4882a593Smuzhiyun {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 670*4882a593Smuzhiyun {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 671*4882a593Smuzhiyun {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ 672*4882a593Smuzhiyun {MMC1_SDWP, (M14 | PIN_INPUT_SLEW)}, /* mmc1_sdwp.gpio6_28 */ 673*4882a593Smuzhiyun {GPIO6_11, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 674*4882a593Smuzhiyun {SPI1_SCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.spi1_sclk */ 675*4882a593Smuzhiyun {SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */ 676*4882a593Smuzhiyun {SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */ 677*4882a593Smuzhiyun {SPI1_CS0, (M0 | PIN_INPUT_PULLUP)}, /* spi1_cs0.spi1_cs0 */ 678*4882a593Smuzhiyun {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 679*4882a593Smuzhiyun {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */ 680*4882a593Smuzhiyun {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 681*4882a593Smuzhiyun {SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */ 682*4882a593Smuzhiyun {SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */ 683*4882a593Smuzhiyun {SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */ 684*4882a593Smuzhiyun {SPI2_CS0, (M1 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.uart3_rtsn */ 685*4882a593Smuzhiyun {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 686*4882a593Smuzhiyun {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */ 687*4882a593Smuzhiyun {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 688*4882a593Smuzhiyun {UART1_TXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 689*4882a593Smuzhiyun {UART1_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_ctsn.mmc4_clk */ 690*4882a593Smuzhiyun {UART1_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart1_rtsn.mmc4_cmd */ 691*4882a593Smuzhiyun {UART2_RXD, (M3 | PIN_INPUT_PULLUP)}, /* N/A.mmc4_dat0 */ 692*4882a593Smuzhiyun {UART2_TXD, (M3 | PIN_INPUT_PULLUP)}, /* uart2_txd.mmc4_dat1 */ 693*4882a593Smuzhiyun {UART2_CTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.mmc4_dat2 */ 694*4882a593Smuzhiyun {UART2_RTSN, (M3 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.mmc4_dat3 */ 695*4882a593Smuzhiyun {I2C2_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c2_sda.i2c2_sda */ 696*4882a593Smuzhiyun {I2C2_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c2_scl.i2c2_scl */ 697*4882a593Smuzhiyun {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */ 698*4882a593Smuzhiyun {WAKEUP2, (M14)}, /* Wakeup2.gpio1_2 */ 699*4882a593Smuzhiyun }; 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun #ifdef CONFIG_IODELAY_RECALIBRATION 702*4882a593Smuzhiyun const struct iodelay_cfg_entry dra742_es1_1_iodelay_cfg_array[] = { 703*4882a593Smuzhiyun {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ 704*4882a593Smuzhiyun {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ 705*4882a593Smuzhiyun {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ 706*4882a593Smuzhiyun {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ 707*4882a593Smuzhiyun {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ 708*4882a593Smuzhiyun {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ 709*4882a593Smuzhiyun {0x0740, 0, 0}, /* CFG_RGMII0_TXC_OUT */ 710*4882a593Smuzhiyun {0x074C, 1560, 120}, /* CFG_RGMII0_TXCTL_OUT */ 711*4882a593Smuzhiyun {0x0758, 1570, 120}, /* CFG_RGMII0_TXD0_OUT */ 712*4882a593Smuzhiyun {0x0764, 1500, 120}, /* CFG_RGMII0_TXD1_OUT */ 713*4882a593Smuzhiyun {0x0770, 1775, 120}, /* CFG_RGMII0_TXD2_OUT */ 714*4882a593Smuzhiyun {0x077C, 1875, 120}, /* CFG_RGMII0_TXD3_OUT */ 715*4882a593Smuzhiyun {0x08D0, 0, 0}, /* CFG_VIN1A_CLK0_IN */ 716*4882a593Smuzhiyun {0x08DC, 2600, 0}, /* CFG_VIN1A_D0_IN */ 717*4882a593Smuzhiyun {0x08E8, 2652, 46}, /* CFG_VIN1A_D10_IN */ 718*4882a593Smuzhiyun {0x08F4, 2541, 0}, /* CFG_VIN1A_D11_IN */ 719*4882a593Smuzhiyun {0x0900, 2603, 574}, /* CFG_VIN1A_D12_IN */ 720*4882a593Smuzhiyun {0x090C, 2548, 443}, /* CFG_VIN1A_D13_IN */ 721*4882a593Smuzhiyun {0x0918, 2624, 598}, /* CFG_VIN1A_D14_IN */ 722*4882a593Smuzhiyun {0x0924, 2535, 1027}, /* CFG_VIN1A_D15_IN */ 723*4882a593Smuzhiyun {0x0930, 2526, 818}, /* CFG_VIN1A_D16_IN */ 724*4882a593Smuzhiyun {0x093C, 2623, 797}, /* CFG_VIN1A_D17_IN */ 725*4882a593Smuzhiyun {0x0948, 2578, 888}, /* CFG_VIN1A_D18_IN */ 726*4882a593Smuzhiyun {0x0954, 2574, 1008}, /* CFG_VIN1A_D19_IN */ 727*4882a593Smuzhiyun {0x0960, 2527, 123}, /* CFG_VIN1A_D1_IN */ 728*4882a593Smuzhiyun {0x096C, 2577, 737}, /* CFG_VIN1A_D20_IN */ 729*4882a593Smuzhiyun {0x0978, 2627, 616}, /* CFG_VIN1A_D21_IN */ 730*4882a593Smuzhiyun {0x0984, 2573, 777}, /* CFG_VIN1A_D22_IN */ 731*4882a593Smuzhiyun {0x0990, 2730, 67}, /* CFG_VIN1A_D23_IN */ 732*4882a593Smuzhiyun {0x099C, 2509, 303}, /* CFG_VIN1A_D2_IN */ 733*4882a593Smuzhiyun {0x09A8, 2494, 267}, /* CFG_VIN1A_D3_IN */ 734*4882a593Smuzhiyun {0x09B4, 2474, 0}, /* CFG_VIN1A_D4_IN */ 735*4882a593Smuzhiyun {0x09C0, 2556, 181}, /* CFG_VIN1A_D5_IN */ 736*4882a593Smuzhiyun {0x09CC, 2516, 195}, /* CFG_VIN1A_D6_IN */ 737*4882a593Smuzhiyun {0x09D8, 2589, 210}, /* CFG_VIN1A_D7_IN */ 738*4882a593Smuzhiyun {0x09E4, 2624, 75}, /* CFG_VIN1A_D8_IN */ 739*4882a593Smuzhiyun {0x09F0, 2704, 14}, /* CFG_VIN1A_D9_IN */ 740*4882a593Smuzhiyun {0x09FC, 2469, 55}, /* CFG_VIN1A_DE0_IN */ 741*4882a593Smuzhiyun {0x0A08, 2557, 264}, /* CFG_VIN1A_FLD0_IN */ 742*4882a593Smuzhiyun {0x0A14, 2465, 269}, /* CFG_VIN1A_HSYNC0_IN */ 743*4882a593Smuzhiyun {0x0A20, 2411, 348}, /* CFG_VIN1A_VSYNC0_IN */ 744*4882a593Smuzhiyun {0x0A70, 150, 0}, /* CFG_VIN2A_D12_OUT */ 745*4882a593Smuzhiyun {0x0A7C, 1500, 0}, /* CFG_VIN2A_D13_OUT */ 746*4882a593Smuzhiyun {0x0A88, 1600, 0}, /* CFG_VIN2A_D14_OUT */ 747*4882a593Smuzhiyun {0x0A94, 900, 0}, /* CFG_VIN2A_D15_OUT */ 748*4882a593Smuzhiyun {0x0AA0, 680, 0}, /* CFG_VIN2A_D16_OUT */ 749*4882a593Smuzhiyun {0x0AAC, 500, 0}, /* CFG_VIN2A_D17_OUT */ 750*4882a593Smuzhiyun {0x0AB0, 702, 0}, /* CFG_VIN2A_D18_IN */ 751*4882a593Smuzhiyun {0x0ABC, 136, 976}, /* CFG_VIN2A_D19_IN */ 752*4882a593Smuzhiyun {0x0AD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ 753*4882a593Smuzhiyun {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ 754*4882a593Smuzhiyun {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ 755*4882a593Smuzhiyun {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ 756*4882a593Smuzhiyun {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 757*4882a593Smuzhiyun {0x0150, 1976, 1389}, /* CFG_GPMC_A14_IN */ 758*4882a593Smuzhiyun {0x015C, 1872, 1408}, /* CFG_GPMC_A15_IN */ 759*4882a593Smuzhiyun {0x0168, 1914, 1506}, /* CFG_GPMC_A16_IN */ 760*4882a593Smuzhiyun {0x0170, 57, 0}, /* CFG_GPMC_A16_OUT */ 761*4882a593Smuzhiyun {0x0174, 1904, 1471}, /* CFG_GPMC_A17_IN */ 762*4882a593Smuzhiyun {0x0188, 1690, 0}, /* CFG_GPMC_A18_OUT */ 763*4882a593Smuzhiyun {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 764*4882a593Smuzhiyun }; 765*4882a593Smuzhiyun 766*4882a593Smuzhiyun const struct iodelay_cfg_entry dra742_es2_0_iodelay_cfg_array[] = { 767*4882a593Smuzhiyun {0x06F0, 471, 0}, /* CFG_RGMII0_RXC_IN */ 768*4882a593Smuzhiyun {0x06FC, 30, 1919}, /* CFG_RGMII0_RXCTL_IN */ 769*4882a593Smuzhiyun {0x0708, 74, 1688}, /* CFG_RGMII0_RXD0_IN */ 770*4882a593Smuzhiyun {0x0714, 94, 1697}, /* CFG_RGMII0_RXD1_IN */ 771*4882a593Smuzhiyun {0x0720, 0, 1703}, /* CFG_RGMII0_RXD2_IN */ 772*4882a593Smuzhiyun {0x072C, 70, 1804}, /* CFG_RGMII0_RXD3_IN */ 773*4882a593Smuzhiyun {0x0740, 70, 70}, /* CFG_RGMII0_TXC_OUT */ 774*4882a593Smuzhiyun {0x074C, 35, 70}, /* CFG_RGMII0_TXCTL_OUT */ 775*4882a593Smuzhiyun {0x0758, 100, 130}, /* CFG_RGMII0_TXD0_OUT */ 776*4882a593Smuzhiyun {0x0764, 0, 70}, /* CFG_RGMII0_TXD1_OUT */ 777*4882a593Smuzhiyun {0x0770, 0, 0}, /* CFG_RGMII0_TXD2_OUT */ 778*4882a593Smuzhiyun {0x077C, 100, 130}, /* CFG_RGMII0_TXD3_OUT */ 779*4882a593Smuzhiyun {0x08D0, 0, 0}, /* CFG_VIN1A_CLK0_IN */ 780*4882a593Smuzhiyun {0x08DC, 2105, 619}, /* CFG_VIN1A_D0_IN */ 781*4882a593Smuzhiyun {0x08E8, 2107, 739}, /* CFG_VIN1A_D10_IN */ 782*4882a593Smuzhiyun {0x08F4, 2005, 788}, /* CFG_VIN1A_D11_IN */ 783*4882a593Smuzhiyun {0x0900, 2059, 1297}, /* CFG_VIN1A_D12_IN */ 784*4882a593Smuzhiyun {0x090C, 2027, 1141}, /* CFG_VIN1A_D13_IN */ 785*4882a593Smuzhiyun {0x0918, 2071, 1332}, /* CFG_VIN1A_D14_IN */ 786*4882a593Smuzhiyun {0x0924, 1995, 1764}, /* CFG_VIN1A_D15_IN */ 787*4882a593Smuzhiyun {0x0930, 1999, 1542}, /* CFG_VIN1A_D16_IN */ 788*4882a593Smuzhiyun {0x093C, 2072, 1540}, /* CFG_VIN1A_D17_IN */ 789*4882a593Smuzhiyun {0x0948, 2034, 1629}, /* CFG_VIN1A_D18_IN */ 790*4882a593Smuzhiyun {0x0954, 2026, 1761}, /* CFG_VIN1A_D19_IN */ 791*4882a593Smuzhiyun {0x0960, 2017, 757}, /* CFG_VIN1A_D1_IN */ 792*4882a593Smuzhiyun {0x096C, 2037, 1469}, /* CFG_VIN1A_D20_IN */ 793*4882a593Smuzhiyun {0x0978, 2077, 1349}, /* CFG_VIN1A_D21_IN */ 794*4882a593Smuzhiyun {0x0984, 2022, 1545}, /* CFG_VIN1A_D22_IN */ 795*4882a593Smuzhiyun {0x0990, 2168, 784}, /* CFG_VIN1A_D23_IN */ 796*4882a593Smuzhiyun {0x099C, 1996, 962}, /* CFG_VIN1A_D2_IN */ 797*4882a593Smuzhiyun {0x09A8, 1993, 901}, /* CFG_VIN1A_D3_IN */ 798*4882a593Smuzhiyun {0x09B4, 2098, 499}, /* CFG_VIN1A_D4_IN */ 799*4882a593Smuzhiyun {0x09C0, 2038, 844}, /* CFG_VIN1A_D5_IN */ 800*4882a593Smuzhiyun {0x09CC, 2002, 863}, /* CFG_VIN1A_D6_IN */ 801*4882a593Smuzhiyun {0x09D8, 2063, 873}, /* CFG_VIN1A_D7_IN */ 802*4882a593Smuzhiyun {0x09E4, 2088, 759}, /* CFG_VIN1A_D8_IN */ 803*4882a593Smuzhiyun {0x09F0, 2152, 701}, /* CFG_VIN1A_D9_IN */ 804*4882a593Smuzhiyun {0x09FC, 1926, 728}, /* CFG_VIN1A_DE0_IN */ 805*4882a593Smuzhiyun {0x0A08, 2043, 937}, /* CFG_VIN1A_FLD0_IN */ 806*4882a593Smuzhiyun {0x0A14, 1978, 909}, /* CFG_VIN1A_HSYNC0_IN */ 807*4882a593Smuzhiyun {0x0A20, 1926, 987}, /* CFG_VIN1A_VSYNC0_IN */ 808*4882a593Smuzhiyun {0x0A70, 140, 0}, /* CFG_VIN2A_D12_OUT */ 809*4882a593Smuzhiyun {0x0A7C, 90, 70}, /* CFG_VIN2A_D13_OUT */ 810*4882a593Smuzhiyun {0x0A88, 0, 0}, /* CFG_VIN2A_D14_OUT */ 811*4882a593Smuzhiyun {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 812*4882a593Smuzhiyun {0x0AA0, 0, 70}, /* CFG_VIN2A_D16_OUT */ 813*4882a593Smuzhiyun {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ 814*4882a593Smuzhiyun {0x0AB0, 612, 0}, /* CFG_VIN2A_D18_IN */ 815*4882a593Smuzhiyun {0x0ABC, 4, 927}, /* CFG_VIN2A_D19_IN */ 816*4882a593Smuzhiyun {0x0AD4, 136, 1340}, /* CFG_VIN2A_D20_IN */ 817*4882a593Smuzhiyun {0x0AE0, 130, 1450}, /* CFG_VIN2A_D21_IN */ 818*4882a593Smuzhiyun {0x0AEC, 144, 1269}, /* CFG_VIN2A_D22_IN */ 819*4882a593Smuzhiyun {0x0AF8, 0, 1330}, /* CFG_VIN2A_D23_IN */ 820*4882a593Smuzhiyun {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 821*4882a593Smuzhiyun {0x0150, 2575, 966}, /* CFG_GPMC_A14_IN */ 822*4882a593Smuzhiyun {0x015C, 2503, 889}, /* CFG_GPMC_A15_IN */ 823*4882a593Smuzhiyun {0x0168, 2528, 1007}, /* CFG_GPMC_A16_IN */ 824*4882a593Smuzhiyun {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 825*4882a593Smuzhiyun {0x0174, 2533, 980}, /* CFG_GPMC_A17_IN */ 826*4882a593Smuzhiyun {0x0188, 590, 0}, /* CFG_GPMC_A18_OUT */ 827*4882a593Smuzhiyun {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 828*4882a593Smuzhiyun }; 829*4882a593Smuzhiyun #endif 830*4882a593Smuzhiyun 831*4882a593Smuzhiyun #endif /* _MUX_DATA_DRA7XX_H_ */ 832