1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2004-2011
3*4882a593Smuzhiyun * Texas Instruments, <www.ti.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author :
6*4882a593Smuzhiyun * Sunil Kumar <sunilsaini05@gmail.com>
7*4882a593Smuzhiyun * Shashi Ranjan <shashiranjanmca05@gmail.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Derived from Beagle Board and 3430 SDP code by
10*4882a593Smuzhiyun * Richard Woodruff <r-woodruff2@ti.com>
11*4882a593Smuzhiyun * Syed Mohammed Khasim <khasim@ti.com>
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun #include <common.h>
17*4882a593Smuzhiyun #include <dm.h>
18*4882a593Smuzhiyun #include <ns16550.h>
19*4882a593Smuzhiyun #ifdef CONFIG_LED_STATUS
20*4882a593Smuzhiyun #include <status_led.h>
21*4882a593Smuzhiyun #endif
22*4882a593Smuzhiyun #include <twl4030.h>
23*4882a593Smuzhiyun #include <linux/mtd/rawnand.h>
24*4882a593Smuzhiyun #include <asm/io.h>
25*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
26*4882a593Smuzhiyun #include <asm/arch/mux.h>
27*4882a593Smuzhiyun #include <asm/arch/mem.h>
28*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
29*4882a593Smuzhiyun #include <asm/gpio.h>
30*4882a593Smuzhiyun #include <asm/mach-types.h>
31*4882a593Smuzhiyun #include <asm/omap_musb.h>
32*4882a593Smuzhiyun #include <linux/errno.h>
33*4882a593Smuzhiyun #include <linux/usb/ch9.h>
34*4882a593Smuzhiyun #include <linux/usb/gadget.h>
35*4882a593Smuzhiyun #include <linux/usb/musb.h>
36*4882a593Smuzhiyun #include "beagle.h"
37*4882a593Smuzhiyun #include <command.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #ifdef CONFIG_USB_EHCI_HCD
40*4882a593Smuzhiyun #include <usb.h>
41*4882a593Smuzhiyun #include <asm/ehci-omap.h>
42*4882a593Smuzhiyun #endif
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define TWL4030_I2C_BUS 0
45*4882a593Smuzhiyun #define EXPANSION_EEPROM_I2C_BUS 1
46*4882a593Smuzhiyun #define EXPANSION_EEPROM_I2C_ADDRESS 0x50
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #define TINCANTOOLS_ZIPPY 0x01000100
49*4882a593Smuzhiyun #define TINCANTOOLS_ZIPPY2 0x02000100
50*4882a593Smuzhiyun #define TINCANTOOLS_TRAINER 0x04000100
51*4882a593Smuzhiyun #define TINCANTOOLS_SHOWDOG 0x03000100
52*4882a593Smuzhiyun #define KBADC_BEAGLEFPGA 0x01000600
53*4882a593Smuzhiyun #define LW_BEAGLETOUCH 0x01000700
54*4882a593Smuzhiyun #define BRAINMUX_LCDOG 0x01000800
55*4882a593Smuzhiyun #define BRAINMUX_LCDOGTOUCH 0x02000800
56*4882a593Smuzhiyun #define BBTOYS_WIFI 0x01000B00
57*4882a593Smuzhiyun #define BBTOYS_VGA 0x02000B00
58*4882a593Smuzhiyun #define BBTOYS_LCD 0x03000B00
59*4882a593Smuzhiyun #define BCT_BRETTL3 0x01000F00
60*4882a593Smuzhiyun #define BCT_BRETTL4 0x02000F00
61*4882a593Smuzhiyun #define LSR_COM6L_ADPT 0x01001300
62*4882a593Smuzhiyun #define BEAGLE_NO_EEPROM 0xffffffff
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static struct {
67*4882a593Smuzhiyun unsigned int device_vendor;
68*4882a593Smuzhiyun unsigned char revision;
69*4882a593Smuzhiyun unsigned char content;
70*4882a593Smuzhiyun char fab_revision[8];
71*4882a593Smuzhiyun char env_var[16];
72*4882a593Smuzhiyun char env_setting[64];
73*4882a593Smuzhiyun } expansion_config;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static const struct ns16550_platdata beagle_serial = {
76*4882a593Smuzhiyun .base = OMAP34XX_UART3,
77*4882a593Smuzhiyun .reg_shift = 2,
78*4882a593Smuzhiyun .clock = V_NS16550_CLK,
79*4882a593Smuzhiyun .fcr = UART_FCR_DEFVAL,
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun U_BOOT_DEVICE(beagle_uart) = {
83*4882a593Smuzhiyun "ns16550_serial",
84*4882a593Smuzhiyun &beagle_serial
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun * Routine: board_init
89*4882a593Smuzhiyun * Description: Early hardware init.
90*4882a593Smuzhiyun */
board_init(void)91*4882a593Smuzhiyun int board_init(void)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
94*4882a593Smuzhiyun /* board id for Linux */
95*4882a593Smuzhiyun gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
96*4882a593Smuzhiyun /* boot param addr */
97*4882a593Smuzhiyun gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE)
100*4882a593Smuzhiyun status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON);
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * Routine: get_board_revision
108*4882a593Smuzhiyun * Description: Detect if we are running on a Beagle revision Ax/Bx,
109*4882a593Smuzhiyun * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
110*4882a593Smuzhiyun * the level of GPIO173, GPIO172 and GPIO171. This should
111*4882a593Smuzhiyun * result in
112*4882a593Smuzhiyun * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
113*4882a593Smuzhiyun * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
114*4882a593Smuzhiyun * GPIO173, GPIO172, GPIO171: 1 0 1 => C4
115*4882a593Smuzhiyun * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
116*4882a593Smuzhiyun * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
117*4882a593Smuzhiyun */
get_board_revision(void)118*4882a593Smuzhiyun static int get_board_revision(void)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun static int revision = -1;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun if (revision == -1) {
123*4882a593Smuzhiyun if (!gpio_request(171, "rev0") &&
124*4882a593Smuzhiyun !gpio_request(172, "rev1") &&
125*4882a593Smuzhiyun !gpio_request(173, "rev2")) {
126*4882a593Smuzhiyun gpio_direction_input(171);
127*4882a593Smuzhiyun gpio_direction_input(172);
128*4882a593Smuzhiyun gpio_direction_input(173);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun revision = gpio_get_value(173) << 2 |
131*4882a593Smuzhiyun gpio_get_value(172) << 1 |
132*4882a593Smuzhiyun gpio_get_value(171);
133*4882a593Smuzhiyun } else {
134*4882a593Smuzhiyun printf("Error: unable to acquire board revision GPIOs\n");
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun return revision;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
142*4882a593Smuzhiyun /*
143*4882a593Smuzhiyun * Routine: get_board_mem_timings
144*4882a593Smuzhiyun * Description: If we use SPL then there is no x-loader nor config header
145*4882a593Smuzhiyun * so we have to setup the DDR timings ourself on both banks.
146*4882a593Smuzhiyun */
get_board_mem_timings(struct board_sdrc_timings * timings)147*4882a593Smuzhiyun void get_board_mem_timings(struct board_sdrc_timings *timings)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun int pop_mfr, pop_id;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * We need to identify what PoP memory is on the board so that
153*4882a593Smuzhiyun * we know what timings to use. If we can't identify it then
154*4882a593Smuzhiyun * we know it's an xM. To map the ID values please see nand_ids.c
155*4882a593Smuzhiyun */
156*4882a593Smuzhiyun identify_nand_chip(&pop_mfr, &pop_id);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun timings->mr = MICRON_V_MR_165;
159*4882a593Smuzhiyun switch (get_board_revision()) {
160*4882a593Smuzhiyun case REVISION_C4:
161*4882a593Smuzhiyun if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
162*4882a593Smuzhiyun /* 512MB DDR */
163*4882a593Smuzhiyun timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
164*4882a593Smuzhiyun timings->ctrla = NUMONYX_V_ACTIMA_165;
165*4882a593Smuzhiyun timings->ctrlb = NUMONYX_V_ACTIMB_165;
166*4882a593Smuzhiyun timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
167*4882a593Smuzhiyun break;
168*4882a593Smuzhiyun } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
169*4882a593Smuzhiyun /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
170*4882a593Smuzhiyun timings->mcfg = MICRON_V_MCFG_165(128 << 20);
171*4882a593Smuzhiyun timings->ctrla = MICRON_V_ACTIMA_165;
172*4882a593Smuzhiyun timings->ctrlb = MICRON_V_ACTIMB_165;
173*4882a593Smuzhiyun timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
174*4882a593Smuzhiyun break;
175*4882a593Smuzhiyun } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
176*4882a593Smuzhiyun /* Beagleboard Rev C5, 256MB DDR */
177*4882a593Smuzhiyun timings->mcfg = MICRON_V_MCFG_200(256 << 20);
178*4882a593Smuzhiyun timings->ctrla = MICRON_V_ACTIMA_200;
179*4882a593Smuzhiyun timings->ctrlb = MICRON_V_ACTIMB_200;
180*4882a593Smuzhiyun timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun case REVISION_XM_AB:
184*4882a593Smuzhiyun case REVISION_XM_C:
185*4882a593Smuzhiyun if (pop_mfr == 0) {
186*4882a593Smuzhiyun /* 256MB DDR */
187*4882a593Smuzhiyun timings->mcfg = MICRON_V_MCFG_200(256 << 20);
188*4882a593Smuzhiyun timings->ctrla = MICRON_V_ACTIMA_200;
189*4882a593Smuzhiyun timings->ctrlb = MICRON_V_ACTIMB_200;
190*4882a593Smuzhiyun timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
191*4882a593Smuzhiyun } else {
192*4882a593Smuzhiyun /* 512MB DDR */
193*4882a593Smuzhiyun timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
194*4882a593Smuzhiyun timings->ctrla = NUMONYX_V_ACTIMA_165;
195*4882a593Smuzhiyun timings->ctrlb = NUMONYX_V_ACTIMB_165;
196*4882a593Smuzhiyun timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun break;
199*4882a593Smuzhiyun default:
200*4882a593Smuzhiyun /* Assume 128MB and Micron/165MHz timings to be safe */
201*4882a593Smuzhiyun timings->mcfg = MICRON_V_MCFG_165(128 << 20);
202*4882a593Smuzhiyun timings->ctrla = MICRON_V_ACTIMA_165;
203*4882a593Smuzhiyun timings->ctrlb = MICRON_V_ACTIMB_165;
204*4882a593Smuzhiyun timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun #endif
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /*
210*4882a593Smuzhiyun * Routine: get_expansion_id
211*4882a593Smuzhiyun * Description: This function checks for expansion board by checking I2C
212*4882a593Smuzhiyun * bus 1 for the availability of an AT24C01B serial EEPROM.
213*4882a593Smuzhiyun * returns the device_vendor field from the EEPROM
214*4882a593Smuzhiyun */
get_expansion_id(void)215*4882a593Smuzhiyun static unsigned int get_expansion_id(void)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
220*4882a593Smuzhiyun if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
221*4882a593Smuzhiyun i2c_set_bus_num(TWL4030_I2C_BUS);
222*4882a593Smuzhiyun return BEAGLE_NO_EEPROM;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* read configuration data */
226*4882a593Smuzhiyun i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
227*4882a593Smuzhiyun sizeof(expansion_config));
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* retry reading configuration data with 16bit addressing */
230*4882a593Smuzhiyun if ((expansion_config.device_vendor == 0xFFFFFF00) ||
231*4882a593Smuzhiyun (expansion_config.device_vendor == 0xFFFFFFFF)) {
232*4882a593Smuzhiyun printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
233*4882a593Smuzhiyun i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
234*4882a593Smuzhiyun sizeof(expansion_config));
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun i2c_set_bus_num(TWL4030_I2C_BUS);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun return expansion_config.device_vendor;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_OMAP3
243*4882a593Smuzhiyun /*
244*4882a593Smuzhiyun * Configure DSS to display background color on DVID
245*4882a593Smuzhiyun * Configure VENC to display color bar on S-Video
246*4882a593Smuzhiyun */
beagle_display_init(void)247*4882a593Smuzhiyun static void beagle_display_init(void)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
250*4882a593Smuzhiyun switch (get_board_revision()) {
251*4882a593Smuzhiyun case REVISION_AXBX:
252*4882a593Smuzhiyun case REVISION_CX:
253*4882a593Smuzhiyun case REVISION_C4:
254*4882a593Smuzhiyun omap3_dss_panel_config(&dvid_cfg);
255*4882a593Smuzhiyun break;
256*4882a593Smuzhiyun case REVISION_XM_AB:
257*4882a593Smuzhiyun case REVISION_XM_C:
258*4882a593Smuzhiyun default:
259*4882a593Smuzhiyun omap3_dss_panel_config(&dvid_cfg_xm);
260*4882a593Smuzhiyun break;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /*
265*4882a593Smuzhiyun * Enable DVI power
266*4882a593Smuzhiyun */
beagle_dvi_pup(void)267*4882a593Smuzhiyun static void beagle_dvi_pup(void)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun uchar val;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun switch (get_board_revision()) {
272*4882a593Smuzhiyun case REVISION_AXBX:
273*4882a593Smuzhiyun case REVISION_CX:
274*4882a593Smuzhiyun case REVISION_C4:
275*4882a593Smuzhiyun gpio_request(170, "dvi");
276*4882a593Smuzhiyun gpio_direction_output(170, 0);
277*4882a593Smuzhiyun gpio_set_value(170, 1);
278*4882a593Smuzhiyun break;
279*4882a593Smuzhiyun case REVISION_XM_AB:
280*4882a593Smuzhiyun case REVISION_XM_C:
281*4882a593Smuzhiyun default:
282*4882a593Smuzhiyun #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
283*4882a593Smuzhiyun #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
286*4882a593Smuzhiyun val |= 4;
287*4882a593Smuzhiyun i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
290*4882a593Smuzhiyun val |= 4;
291*4882a593Smuzhiyun i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
292*4882a593Smuzhiyun break;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun #endif
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_OMAP2PLUS
298*4882a593Smuzhiyun static struct musb_hdrc_config musb_config = {
299*4882a593Smuzhiyun .multipoint = 1,
300*4882a593Smuzhiyun .dyn_fifo = 1,
301*4882a593Smuzhiyun .num_eps = 16,
302*4882a593Smuzhiyun .ram_bits = 12,
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun static struct omap_musb_board_data musb_board_data = {
306*4882a593Smuzhiyun .interface_type = MUSB_INTERFACE_ULPI,
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun static struct musb_hdrc_platform_data musb_plat = {
310*4882a593Smuzhiyun #if defined(CONFIG_USB_MUSB_HOST)
311*4882a593Smuzhiyun .mode = MUSB_HOST,
312*4882a593Smuzhiyun #elif defined(CONFIG_USB_MUSB_GADGET)
313*4882a593Smuzhiyun .mode = MUSB_PERIPHERAL,
314*4882a593Smuzhiyun #else
315*4882a593Smuzhiyun #error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
316*4882a593Smuzhiyun #endif
317*4882a593Smuzhiyun .config = &musb_config,
318*4882a593Smuzhiyun .power = 100,
319*4882a593Smuzhiyun .platform_ops = &omap2430_ops,
320*4882a593Smuzhiyun .board_data = &musb_board_data,
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun #endif
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /*
325*4882a593Smuzhiyun * Routine: misc_init_r
326*4882a593Smuzhiyun * Description: Configure board specific parts
327*4882a593Smuzhiyun */
misc_init_r(void)328*4882a593Smuzhiyun int misc_init_r(void)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
331*4882a593Smuzhiyun struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
332*4882a593Smuzhiyun struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
333*4882a593Smuzhiyun bool generate_fake_mac = false;
334*4882a593Smuzhiyun u32 value;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* Enable i2c2 pullup resisters */
337*4882a593Smuzhiyun value = readl(&prog_io_base->io1);
338*4882a593Smuzhiyun value &= ~(PRG_I2C2_PULLUPRESX);
339*4882a593Smuzhiyun writel(value, &prog_io_base->io1);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun switch (get_board_revision()) {
342*4882a593Smuzhiyun case REVISION_AXBX:
343*4882a593Smuzhiyun printf("Beagle Rev Ax/Bx\n");
344*4882a593Smuzhiyun env_set("beaglerev", "AxBx");
345*4882a593Smuzhiyun break;
346*4882a593Smuzhiyun case REVISION_CX:
347*4882a593Smuzhiyun printf("Beagle Rev C1/C2/C3\n");
348*4882a593Smuzhiyun env_set("beaglerev", "Cx");
349*4882a593Smuzhiyun MUX_BEAGLE_C();
350*4882a593Smuzhiyun break;
351*4882a593Smuzhiyun case REVISION_C4:
352*4882a593Smuzhiyun printf("Beagle Rev C4\n");
353*4882a593Smuzhiyun env_set("beaglerev", "C4");
354*4882a593Smuzhiyun MUX_BEAGLE_C();
355*4882a593Smuzhiyun /* Set VAUX2 to 1.8V for EHCI PHY */
356*4882a593Smuzhiyun twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
357*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
358*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
359*4882a593Smuzhiyun TWL4030_PM_RECEIVER_DEV_GRP_P1);
360*4882a593Smuzhiyun break;
361*4882a593Smuzhiyun case REVISION_XM_AB:
362*4882a593Smuzhiyun printf("Beagle xM Rev A/B\n");
363*4882a593Smuzhiyun env_set("beaglerev", "xMAB");
364*4882a593Smuzhiyun MUX_BEAGLE_XM();
365*4882a593Smuzhiyun /* Set VAUX2 to 1.8V for EHCI PHY */
366*4882a593Smuzhiyun twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
367*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
368*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
369*4882a593Smuzhiyun TWL4030_PM_RECEIVER_DEV_GRP_P1);
370*4882a593Smuzhiyun generate_fake_mac = true;
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun case REVISION_XM_C:
373*4882a593Smuzhiyun printf("Beagle xM Rev C\n");
374*4882a593Smuzhiyun env_set("beaglerev", "xMC");
375*4882a593Smuzhiyun MUX_BEAGLE_XM();
376*4882a593Smuzhiyun /* Set VAUX2 to 1.8V for EHCI PHY */
377*4882a593Smuzhiyun twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
378*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
379*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
380*4882a593Smuzhiyun TWL4030_PM_RECEIVER_DEV_GRP_P1);
381*4882a593Smuzhiyun generate_fake_mac = true;
382*4882a593Smuzhiyun break;
383*4882a593Smuzhiyun default:
384*4882a593Smuzhiyun printf("Beagle unknown 0x%02x\n", get_board_revision());
385*4882a593Smuzhiyun MUX_BEAGLE_XM();
386*4882a593Smuzhiyun /* Set VAUX2 to 1.8V for EHCI PHY */
387*4882a593Smuzhiyun twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
388*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
389*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
390*4882a593Smuzhiyun TWL4030_PM_RECEIVER_DEV_GRP_P1);
391*4882a593Smuzhiyun generate_fake_mac = true;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun switch (get_expansion_id()) {
395*4882a593Smuzhiyun case TINCANTOOLS_ZIPPY:
396*4882a593Smuzhiyun printf("Recognized Tincantools Zippy board (rev %d %s)\n",
397*4882a593Smuzhiyun expansion_config.revision,
398*4882a593Smuzhiyun expansion_config.fab_revision);
399*4882a593Smuzhiyun MUX_TINCANTOOLS_ZIPPY();
400*4882a593Smuzhiyun env_set("buddy", "zippy");
401*4882a593Smuzhiyun break;
402*4882a593Smuzhiyun case TINCANTOOLS_ZIPPY2:
403*4882a593Smuzhiyun printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
404*4882a593Smuzhiyun expansion_config.revision,
405*4882a593Smuzhiyun expansion_config.fab_revision);
406*4882a593Smuzhiyun MUX_TINCANTOOLS_ZIPPY();
407*4882a593Smuzhiyun env_set("buddy", "zippy2");
408*4882a593Smuzhiyun break;
409*4882a593Smuzhiyun case TINCANTOOLS_TRAINER:
410*4882a593Smuzhiyun printf("Recognized Tincantools Trainer board (rev %d %s)\n",
411*4882a593Smuzhiyun expansion_config.revision,
412*4882a593Smuzhiyun expansion_config.fab_revision);
413*4882a593Smuzhiyun MUX_TINCANTOOLS_ZIPPY();
414*4882a593Smuzhiyun MUX_TINCANTOOLS_TRAINER();
415*4882a593Smuzhiyun env_set("buddy", "trainer");
416*4882a593Smuzhiyun break;
417*4882a593Smuzhiyun case TINCANTOOLS_SHOWDOG:
418*4882a593Smuzhiyun printf("Recognized Tincantools Showdow board (rev %d %s)\n",
419*4882a593Smuzhiyun expansion_config.revision,
420*4882a593Smuzhiyun expansion_config.fab_revision);
421*4882a593Smuzhiyun /* Place holder for DSS2 definition for showdog lcd */
422*4882a593Smuzhiyun env_set("defaultdisplay", "showdoglcd");
423*4882a593Smuzhiyun env_set("buddy", "showdog");
424*4882a593Smuzhiyun break;
425*4882a593Smuzhiyun case KBADC_BEAGLEFPGA:
426*4882a593Smuzhiyun printf("Recognized KBADC Beagle FPGA board\n");
427*4882a593Smuzhiyun MUX_KBADC_BEAGLEFPGA();
428*4882a593Smuzhiyun env_set("buddy", "beaglefpga");
429*4882a593Smuzhiyun break;
430*4882a593Smuzhiyun case LW_BEAGLETOUCH:
431*4882a593Smuzhiyun printf("Recognized Liquidware BeagleTouch board\n");
432*4882a593Smuzhiyun env_set("buddy", "beagletouch");
433*4882a593Smuzhiyun break;
434*4882a593Smuzhiyun case BRAINMUX_LCDOG:
435*4882a593Smuzhiyun printf("Recognized Brainmux LCDog board\n");
436*4882a593Smuzhiyun env_set("buddy", "lcdog");
437*4882a593Smuzhiyun break;
438*4882a593Smuzhiyun case BRAINMUX_LCDOGTOUCH:
439*4882a593Smuzhiyun printf("Recognized Brainmux LCDog Touch board\n");
440*4882a593Smuzhiyun env_set("buddy", "lcdogtouch");
441*4882a593Smuzhiyun break;
442*4882a593Smuzhiyun case BBTOYS_WIFI:
443*4882a593Smuzhiyun printf("Recognized BeagleBoardToys WiFi board\n");
444*4882a593Smuzhiyun MUX_BBTOYS_WIFI()
445*4882a593Smuzhiyun env_set("buddy", "bbtoys-wifi");
446*4882a593Smuzhiyun break;
447*4882a593Smuzhiyun case BBTOYS_VGA:
448*4882a593Smuzhiyun printf("Recognized BeagleBoardToys VGA board\n");
449*4882a593Smuzhiyun break;
450*4882a593Smuzhiyun case BBTOYS_LCD:
451*4882a593Smuzhiyun printf("Recognized BeagleBoardToys LCD board\n");
452*4882a593Smuzhiyun break;
453*4882a593Smuzhiyun case BCT_BRETTL3:
454*4882a593Smuzhiyun printf("Recognized bct electronic GmbH brettl3 board\n");
455*4882a593Smuzhiyun break;
456*4882a593Smuzhiyun case BCT_BRETTL4:
457*4882a593Smuzhiyun printf("Recognized bct electronic GmbH brettl4 board\n");
458*4882a593Smuzhiyun break;
459*4882a593Smuzhiyun case LSR_COM6L_ADPT:
460*4882a593Smuzhiyun printf("Recognized LSR COM6L Adapter Board\n");
461*4882a593Smuzhiyun MUX_BBTOYS_WIFI()
462*4882a593Smuzhiyun env_set("buddy", "lsr-com6l-adpt");
463*4882a593Smuzhiyun break;
464*4882a593Smuzhiyun case BEAGLE_NO_EEPROM:
465*4882a593Smuzhiyun printf("No EEPROM on expansion board\n");
466*4882a593Smuzhiyun env_set("buddy", "none");
467*4882a593Smuzhiyun break;
468*4882a593Smuzhiyun default:
469*4882a593Smuzhiyun printf("Unrecognized expansion board: %x\n",
470*4882a593Smuzhiyun expansion_config.device_vendor);
471*4882a593Smuzhiyun env_set("buddy", "unknown");
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun if (expansion_config.content == 1)
475*4882a593Smuzhiyun env_set(expansion_config.env_var, expansion_config.env_setting);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun twl4030_power_init();
478*4882a593Smuzhiyun switch (get_board_revision()) {
479*4882a593Smuzhiyun case REVISION_XM_AB:
480*4882a593Smuzhiyun twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
481*4882a593Smuzhiyun break;
482*4882a593Smuzhiyun default:
483*4882a593Smuzhiyun twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
484*4882a593Smuzhiyun break;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /* Set GPIO states before they are made outputs */
488*4882a593Smuzhiyun writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
489*4882a593Smuzhiyun &gpio6_base->setdataout);
490*4882a593Smuzhiyun writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
491*4882a593Smuzhiyun GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun /* Configure GPIOs to output */
494*4882a593Smuzhiyun writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
495*4882a593Smuzhiyun writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
496*4882a593Smuzhiyun GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun omap_die_id_display();
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_OMAP3
501*4882a593Smuzhiyun beagle_dvi_pup();
502*4882a593Smuzhiyun beagle_display_init();
503*4882a593Smuzhiyun omap3_dss_enable();
504*4882a593Smuzhiyun #endif
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun #ifdef CONFIG_USB_MUSB_OMAP2PLUS
507*4882a593Smuzhiyun musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
508*4882a593Smuzhiyun #endif
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun if (generate_fake_mac)
511*4882a593Smuzhiyun omap_die_id_usbethaddr();
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun return 0;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun /*
517*4882a593Smuzhiyun * Routine: set_muxconf_regs
518*4882a593Smuzhiyun * Description: Setting up the configuration Mux registers specific to the
519*4882a593Smuzhiyun * hardware. Many pins need to be moved from protect to primary
520*4882a593Smuzhiyun * mode.
521*4882a593Smuzhiyun */
set_muxconf_regs(void)522*4882a593Smuzhiyun void set_muxconf_regs(void)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun MUX_BEAGLE();
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun #if defined(CONFIG_MMC)
board_mmc_init(bd_t * bis)528*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun return omap_mmc_init(0, 0, 0, -1, -1);
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun #endif
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun #if defined(CONFIG_MMC)
board_mmc_power_init(void)535*4882a593Smuzhiyun void board_mmc_power_init(void)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun twl4030_power_mmc_init(0);
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun #endif
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun #if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
542*4882a593Smuzhiyun /* Call usb_stop() before starting the kernel */
show_boot_progress(int val)543*4882a593Smuzhiyun void show_boot_progress(int val)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun if (val == BOOTSTAGE_ID_RUN_OS)
546*4882a593Smuzhiyun usb_stop();
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun static struct omap_usbhs_board_data usbhs_bdata = {
550*4882a593Smuzhiyun .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
551*4882a593Smuzhiyun .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
552*4882a593Smuzhiyun .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
553*4882a593Smuzhiyun };
554*4882a593Smuzhiyun
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)555*4882a593Smuzhiyun int ehci_hcd_init(int index, enum usb_init_type init,
556*4882a593Smuzhiyun struct ehci_hccr **hccr, struct ehci_hcor **hcor)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
559*4882a593Smuzhiyun }
560*4882a593Smuzhiyun
ehci_hcd_stop(int index)561*4882a593Smuzhiyun int ehci_hcd_stop(int index)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun return omap_ehci_hcd_stop();
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun #endif /* CONFIG_USB_EHCI_HCD */
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)
board_eth_init(bd_t * bis)569*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun return usb_eth_initialize(bis);
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun #endif
574