1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * am3517crane.c - board file for AM3517 CraneBoard 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Srinath.R <srinath@mistralsolutions.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on logicpd/am3517evm/am3517evm.c 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (C) 2011 Mistral Solutions Pvt Ltd 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <common.h> 14*4882a593Smuzhiyun #include <asm/io.h> 15*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h> 16*4882a593Smuzhiyun #include <asm/arch/mem.h> 17*4882a593Smuzhiyun #include <asm/arch/mux.h> 18*4882a593Smuzhiyun #include <asm/arch/sys_proto.h> 19*4882a593Smuzhiyun #include <asm/mach-types.h> 20*4882a593Smuzhiyun #include <i2c.h> 21*4882a593Smuzhiyun #include "am3517crane.h" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* 26*4882a593Smuzhiyun * Routine: board_init 27*4882a593Smuzhiyun * Description: Early hardware init. 28*4882a593Smuzhiyun */ board_init(void)29*4882a593Smuzhiyunint board_init(void) 30*4882a593Smuzhiyun { 31*4882a593Smuzhiyun gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 32*4882a593Smuzhiyun /* board id for Linux */ 33*4882a593Smuzhiyun gd->bd->bi_arch_number = MACH_TYPE_CRANEBOARD; 34*4882a593Smuzhiyun /* boot param addr */ 35*4882a593Smuzhiyun gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun return 0; 38*4882a593Smuzhiyun } 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /* 41*4882a593Smuzhiyun * Routine: misc_init_r 42*4882a593Smuzhiyun * Description: Init i2c, ethernet, etc... (done here so udelay works) 43*4882a593Smuzhiyun */ misc_init_r(void)44*4882a593Smuzhiyunint misc_init_r(void) 45*4882a593Smuzhiyun { 46*4882a593Smuzhiyun #ifdef CONFIG_SYS_I2C_OMAP24XX 47*4882a593Smuzhiyun i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); 48*4882a593Smuzhiyun #endif 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun omap_die_id_display(); 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun return 0; 53*4882a593Smuzhiyun } 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* 56*4882a593Smuzhiyun * Routine: set_muxconf_regs 57*4882a593Smuzhiyun * Description: Setting up the configuration Mux registers specific to the 58*4882a593Smuzhiyun * hardware. Many pins need to be moved from protect to primary 59*4882a593Smuzhiyun * mode. 60*4882a593Smuzhiyun */ set_muxconf_regs(void)61*4882a593Smuzhiyunvoid set_muxconf_regs(void) 62*4882a593Smuzhiyun { 63*4882a593Smuzhiyun MUX_AM3517CRANE(); 64*4882a593Smuzhiyun } 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #if defined(CONFIG_MMC) board_mmc_init(bd_t * bis)67*4882a593Smuzhiyunint board_mmc_init(bd_t *bis) 68*4882a593Smuzhiyun { 69*4882a593Smuzhiyun return omap_mmc_init(0, 0, 0, -1, -1); 70*4882a593Smuzhiyun } 71*4882a593Smuzhiyun #endif 72