1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * board.h
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * TI AM335x boards information header
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #ifndef _BOARD_H_
12*4882a593Smuzhiyun #define _BOARD_H_
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /**
15*4882a593Smuzhiyun * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and
16*4882a593Smuzhiyun * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame
17*4882a593Smuzhiyun * Synchronization Lost errors. The values are the biggest that work
18*4882a593Smuzhiyun * reliably with offered video modes and the memory subsystem on the
19*4882a593Smuzhiyun * boards. These register have are briefly documented in "7.3.3.5.2
20*4882a593Smuzhiyun * Command Starvation" section of AM335x TRM. The REG_COS_COUNT_1 and
21*4882a593Smuzhiyun * REG_COS_COUNT_2 do not have any effect on current versions of
22*4882a593Smuzhiyun * AM335x.
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun #define EMIF_OCP_CONFIG_BEAGLEBONE_BLACK 0x00141414
25*4882a593Smuzhiyun #define EMIF_OCP_CONFIG_AM335X_EVM 0x003d3d3d
26*4882a593Smuzhiyun
board_is_bone(void)27*4882a593Smuzhiyun static inline int board_is_bone(void)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun return board_ti_is("A335BONE");
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
board_is_bone_lt(void)32*4882a593Smuzhiyun static inline int board_is_bone_lt(void)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun return board_ti_is("A335BNLT");
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
board_is_bbg1(void)37*4882a593Smuzhiyun static inline int board_is_bbg1(void)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun return board_is_bone_lt() && !strncmp(board_ti_get_rev(), "BBG1", 4);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
board_is_beaglebonex(void)42*4882a593Smuzhiyun static inline int board_is_beaglebonex(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun return board_is_bone() || board_is_bone_lt() || board_is_bbg1();
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
board_is_evm_sk(void)47*4882a593Smuzhiyun static inline int board_is_evm_sk(void)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return board_ti_is("A335X_SK");
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
board_is_idk(void)52*4882a593Smuzhiyun static inline int board_is_idk(void)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun return !strncmp(board_ti_get_config(), "SKU#02", 6);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
board_is_gp_evm(void)57*4882a593Smuzhiyun static inline int board_is_gp_evm(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return board_ti_is("A33515BB");
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
board_is_evm_15_or_later(void)62*4882a593Smuzhiyun static inline int board_is_evm_15_or_later(void)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun return (board_is_gp_evm() &&
65*4882a593Smuzhiyun strncmp("1.5", board_ti_get_rev(), 3) <= 0);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
board_is_icev2(void)68*4882a593Smuzhiyun static inline int board_is_icev2(void)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return board_ti_is("A335_ICE") && !strncmp("2", board_ti_get_rev(), 1);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun * We have three pin mux functions that must exist. We must be able to enable
75*4882a593Smuzhiyun * uart0, for initial output and i2c0 to read the main EEPROM. We then have a
76*4882a593Smuzhiyun * main pinmux function that can be overridden to enable all other pinmux that
77*4882a593Smuzhiyun * is required on the board.
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun void enable_uart0_pin_mux(void);
80*4882a593Smuzhiyun void enable_uart1_pin_mux(void);
81*4882a593Smuzhiyun void enable_uart2_pin_mux(void);
82*4882a593Smuzhiyun void enable_uart3_pin_mux(void);
83*4882a593Smuzhiyun void enable_uart4_pin_mux(void);
84*4882a593Smuzhiyun void enable_uart5_pin_mux(void);
85*4882a593Smuzhiyun void enable_i2c0_pin_mux(void);
86*4882a593Smuzhiyun void enable_board_pin_mux(void);
87*4882a593Smuzhiyun #endif
88