xref: /OK3568_Linux_fs/u-boot/board/technexion/twister/twister.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2011
3*4882a593Smuzhiyun  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2009 TechNexion Ltd.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <netdev.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun #include <asm/arch/mem.h>
14*4882a593Smuzhiyun #include <asm/arch/mux.h>
15*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
16*4882a593Smuzhiyun #include <asm/omap_gpio.h>
17*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
18*4882a593Smuzhiyun #include <i2c.h>
19*4882a593Smuzhiyun #include <spl.h>
20*4882a593Smuzhiyun #include <mmc.h>
21*4882a593Smuzhiyun #include <asm/gpio.h>
22*4882a593Smuzhiyun #ifdef CONFIG_USB_EHCI_HCD
23*4882a593Smuzhiyun #include <usb.h>
24*4882a593Smuzhiyun #include <asm/ehci-omap.h>
25*4882a593Smuzhiyun #endif
26*4882a593Smuzhiyun #include "twister.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* Timing definitions for Ethernet Controller */
31*4882a593Smuzhiyun static const u32 gpmc_smc911[] = {
32*4882a593Smuzhiyun 	NET_GPMC_CONFIG1,
33*4882a593Smuzhiyun 	NET_GPMC_CONFIG2,
34*4882a593Smuzhiyun 	NET_GPMC_CONFIG3,
35*4882a593Smuzhiyun 	NET_GPMC_CONFIG4,
36*4882a593Smuzhiyun 	NET_GPMC_CONFIG5,
37*4882a593Smuzhiyun 	NET_GPMC_CONFIG6,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static const u32 gpmc_XR16L2751[] = {
41*4882a593Smuzhiyun 	XR16L2751_GPMC_CONFIG1,
42*4882a593Smuzhiyun 	XR16L2751_GPMC_CONFIG2,
43*4882a593Smuzhiyun 	XR16L2751_GPMC_CONFIG3,
44*4882a593Smuzhiyun 	XR16L2751_GPMC_CONFIG4,
45*4882a593Smuzhiyun 	XR16L2751_GPMC_CONFIG5,
46*4882a593Smuzhiyun 	XR16L2751_GPMC_CONFIG6,
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #ifdef CONFIG_USB_EHCI_HCD
50*4882a593Smuzhiyun static struct omap_usbhs_board_data usbhs_bdata = {
51*4882a593Smuzhiyun 	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
52*4882a593Smuzhiyun 	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
53*4882a593Smuzhiyun 	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)56*4882a593Smuzhiyun int ehci_hcd_init(int index, enum usb_init_type init,
57*4882a593Smuzhiyun 		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
ehci_hcd_stop(int index)62*4882a593Smuzhiyun int ehci_hcd_stop(int index)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	return omap_ehci_hcd_stop();
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun #endif
67*4882a593Smuzhiyun 
board_init(void)68*4882a593Smuzhiyun int board_init(void)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	/* boot param addr */
73*4882a593Smuzhiyun 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/* Chip select 1  and 3 are used for XR16L2751 UART controller */
76*4882a593Smuzhiyun 	enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[1],
77*4882a593Smuzhiyun 		XR16L2751_UART1_BASE, GPMC_SIZE_16M);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	enable_gpmc_cs_config(gpmc_XR16L2751, &gpmc_cfg->cs[3],
80*4882a593Smuzhiyun 		XR16L2751_UART2_BASE, GPMC_SIZE_16M);
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	gpio_request(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, "USB_PHY1_RESET");
83*4882a593Smuzhiyun 	gpio_direction_output(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO, 1);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD
misc_init_r(void)89*4882a593Smuzhiyun int misc_init_r(void)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	char *eth_addr;
92*4882a593Smuzhiyun 	struct tam3517_module_info info;
93*4882a593Smuzhiyun 	int ret;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	omap_die_id_display();
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	eth_addr = env_get("ethaddr");
98*4882a593Smuzhiyun 	if (eth_addr)
99*4882a593Smuzhiyun 		return 0;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	TAM3517_READ_EEPROM(&info, ret);
102*4882a593Smuzhiyun 	if (!ret)
103*4882a593Smuzhiyun 		TAM3517_READ_MAC_FROM_EEPROM(&info);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /*
110*4882a593Smuzhiyun  * Routine: set_muxconf_regs
111*4882a593Smuzhiyun  * Description: Setting up the configuration Mux registers specific to the
112*4882a593Smuzhiyun  *		hardware. Many pins need to be moved from protect to primary
113*4882a593Smuzhiyun  *		mode.
114*4882a593Smuzhiyun  */
set_muxconf_regs(void)115*4882a593Smuzhiyun void set_muxconf_regs(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	MUX_TWISTER();
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
board_eth_init(bd_t * bis)120*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	davinci_emac_initialize();
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* init cs for extern lan */
125*4882a593Smuzhiyun 	enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
126*4882a593Smuzhiyun 		CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
127*4882a593Smuzhiyun 	if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0)
128*4882a593Smuzhiyun 		printf("\nError initializing SMC911x controlleri\n");
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun #if defined(CONFIG_MMC_OMAP_HS) && \
134*4882a593Smuzhiyun 	!defined(CONFIG_SPL_BUILD)
board_mmc_init(bd_t * bis)135*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	return omap_mmc_init(0, 0, 0, -1, -1);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun #endif
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun #ifdef CONFIG_SPL_OS_BOOT
142*4882a593Smuzhiyun /*
143*4882a593Smuzhiyun  * Do board specific preparation before SPL
144*4882a593Smuzhiyun  * Linux boot
145*4882a593Smuzhiyun  */
spl_board_prepare_for_linux(void)146*4882a593Smuzhiyun void spl_board_prepare_for_linux(void)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	/* init cs for extern lan */
149*4882a593Smuzhiyun 	enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5],
150*4882a593Smuzhiyun 		CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
151*4882a593Smuzhiyun }
spl_start_uboot(void)152*4882a593Smuzhiyun int spl_start_uboot(void)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	int val = 0;
155*4882a593Smuzhiyun 	if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
156*4882a593Smuzhiyun 		gpio_direction_input(SPL_OS_BOOT_KEY);
157*4882a593Smuzhiyun 		val = gpio_get_value(SPL_OS_BOOT_KEY);
158*4882a593Smuzhiyun 		gpio_free(SPL_OS_BOOT_KEY);
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 	return val;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun #endif
163