xref: /OK3568_Linux_fs/u-boot/board/st/stih410-b2260/board.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Board init file for STiH410-B2260
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com>
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
12*4882a593Smuzhiyun 
dram_init(void)13*4882a593Smuzhiyun int dram_init(void)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun 	gd->ram_size = PHYS_SDRAM_1_SIZE;
16*4882a593Smuzhiyun 	return 0;
17*4882a593Smuzhiyun }
18*4882a593Smuzhiyun 
dram_init_banksize(void)19*4882a593Smuzhiyun int dram_init_banksize(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
22*4882a593Smuzhiyun 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	return 0;
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #ifndef CONFIG_SYS_DCACHE_OFF
enable_caches(void)28*4882a593Smuzhiyun void enable_caches(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	/* Enable D-cache. I-cache is already enabled in start.S */
31*4882a593Smuzhiyun 	dcache_enable();
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun 
board_init(void)35*4882a593Smuzhiyun int board_init(void)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	return 0;
38*4882a593Smuzhiyun }
39