xref: /OK3568_Linux_fs/u-boot/board/sandbox/sandbox.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2011 The Chromium OS Authors.
3*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <common.h>
7*4882a593Smuzhiyun #include <cros_ec.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <os.h>
10*4882a593Smuzhiyun #include <asm/test.h>
11*4882a593Smuzhiyun #include <asm/u-boot-sandbox.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun  * Pointer to initial global data area
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * Here we initialize it.
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun gd_t *gd;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun /* Add a simple GPIO device */
21*4882a593Smuzhiyun U_BOOT_DEVICE(gpio_sandbox) = {
22*4882a593Smuzhiyun 	.name = "gpio_sandbox",
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun 
flush_cache(unsigned long start,unsigned long size)25*4882a593Smuzhiyun void flush_cache(unsigned long start, unsigned long size)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #ifndef CONFIG_TIMER
30*4882a593Smuzhiyun /* system timer offset in ms */
31*4882a593Smuzhiyun static unsigned long sandbox_timer_offset;
32*4882a593Smuzhiyun 
sandbox_timer_add_offset(unsigned long offset)33*4882a593Smuzhiyun void sandbox_timer_add_offset(unsigned long offset)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	sandbox_timer_offset += offset;
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun 
timer_read_counter(void)38*4882a593Smuzhiyun unsigned long timer_read_counter(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun #endif
43*4882a593Smuzhiyun 
dram_init(void)44*4882a593Smuzhiyun int dram_init(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
47*4882a593Smuzhiyun 	return 0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #ifdef CONFIG_BOARD_LATE_INIT
board_late_init(void)51*4882a593Smuzhiyun int board_late_init(void)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	if (cros_ec_get_error()) {
54*4882a593Smuzhiyun 		/* Force console on */
55*4882a593Smuzhiyun 		gd->flags &= ~GD_FLG_SILENT;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 		printf("cros-ec communications failure %d\n",
58*4882a593Smuzhiyun 		       cros_ec_get_error());
59*4882a593Smuzhiyun 		puts("\nPlease reset with Power+Refresh\n\n");
60*4882a593Smuzhiyun 		panic("Cannot init cros-ec device");
61*4882a593Smuzhiyun 		return -1;
62*4882a593Smuzhiyun 	}
63*4882a593Smuzhiyun 	return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun #endif
66