1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Samsung Electronics
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/gpio.h>
9*4882a593Smuzhiyun #include <asm/io.h>
10*4882a593Smuzhiyun #include <netdev.h>
11*4882a593Smuzhiyun #include <asm/arch/cpu.h>
12*4882a593Smuzhiyun #include <asm/arch/mmc.h>
13*4882a593Smuzhiyun #include <asm/arch/periph.h>
14*4882a593Smuzhiyun #include <asm/arch/pinmux.h>
15*4882a593Smuzhiyun #include <asm/arch/sromc.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
18*4882a593Smuzhiyun
smc9115_pre_init(void)19*4882a593Smuzhiyun static void smc9115_pre_init(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun u32 smc_bw_conf, smc_bc_conf;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* gpio configuration GPK0CON */
24*4882a593Smuzhiyun gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Ethernet needs bus width of 16 bits */
27*4882a593Smuzhiyun smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
28*4882a593Smuzhiyun smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
29*4882a593Smuzhiyun | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
30*4882a593Smuzhiyun | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
31*4882a593Smuzhiyun | SROMC_BC_PMC(0x0F);
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Select and configure the SROMC bank */
34*4882a593Smuzhiyun s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
board_init(void)37*4882a593Smuzhiyun int board_init(void)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun smc9115_pre_init();
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
dram_init(void)45*4882a593Smuzhiyun int dram_init(void)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
48*4882a593Smuzhiyun + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
49*4882a593Smuzhiyun + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
50*4882a593Smuzhiyun + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
dram_init_banksize(void)55*4882a593Smuzhiyun int dram_init_banksize(void)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
58*4882a593Smuzhiyun gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
59*4882a593Smuzhiyun PHYS_SDRAM_1_SIZE);
60*4882a593Smuzhiyun gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
61*4882a593Smuzhiyun gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
62*4882a593Smuzhiyun PHYS_SDRAM_2_SIZE);
63*4882a593Smuzhiyun gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
64*4882a593Smuzhiyun gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
65*4882a593Smuzhiyun PHYS_SDRAM_3_SIZE);
66*4882a593Smuzhiyun gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
67*4882a593Smuzhiyun gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
68*4882a593Smuzhiyun PHYS_SDRAM_4_SIZE);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
board_eth_init(bd_t * bis)73*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun int rc = 0;
76*4882a593Smuzhiyun #ifdef CONFIG_SMC911X
77*4882a593Smuzhiyun rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun return rc;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #ifdef CONFIG_DISPLAY_BOARDINFO
checkboard(void)83*4882a593Smuzhiyun int checkboard(void)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun printf("\nBoard: SMDKV310\n");
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun #endif
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #ifdef CONFIG_MMC
board_mmc_init(bd_t * bis)91*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun int i, err;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun * MMC2 SD card GPIO:
97*4882a593Smuzhiyun *
98*4882a593Smuzhiyun * GPK2[0] SD_2_CLK(2)
99*4882a593Smuzhiyun * GPK2[1] SD_2_CMD(2)
100*4882a593Smuzhiyun * GPK2[2] SD_2_CDn
101*4882a593Smuzhiyun * GPK2[3:6] SD_2_DATA[0:3](2)
102*4882a593Smuzhiyun */
103*4882a593Smuzhiyun for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
104*4882a593Smuzhiyun /* GPK2[0:6] special function 2 */
105*4882a593Smuzhiyun gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* GPK2[0:6] drv 4x */
108*4882a593Smuzhiyun gpio_set_drv(i, S5P_GPIO_DRV_4X);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* GPK2[0:1] pull disable */
111*4882a593Smuzhiyun if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
112*4882a593Smuzhiyun gpio_set_pull(i, S5P_GPIO_PULL_NONE);
113*4882a593Smuzhiyun continue;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* GPK2[2:6] pull up */
117*4882a593Smuzhiyun gpio_set_pull(i, S5P_GPIO_PULL_UP);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun err = s5p_mmc_init(2, 4);
120*4882a593Smuzhiyun return err;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun
board_uart_init(void)124*4882a593Smuzhiyun static int board_uart_init(void)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun int err;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
129*4882a593Smuzhiyun if (err) {
130*4882a593Smuzhiyun debug("UART0 not configured\n");
131*4882a593Smuzhiyun return err;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
135*4882a593Smuzhiyun if (err) {
136*4882a593Smuzhiyun debug("UART1 not configured\n");
137*4882a593Smuzhiyun return err;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
141*4882a593Smuzhiyun if (err) {
142*4882a593Smuzhiyun debug("UART2 not configured\n");
143*4882a593Smuzhiyun return err;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
147*4882a593Smuzhiyun if (err) {
148*4882a593Smuzhiyun debug("UART3 not configured\n");
149*4882a593Smuzhiyun return err;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return 0;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun #ifdef CONFIG_BOARD_EARLY_INIT_F
board_early_init_f(void)156*4882a593Smuzhiyun int board_early_init_f(void)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun int err;
159*4882a593Smuzhiyun err = board_uart_init();
160*4882a593Smuzhiyun if (err) {
161*4882a593Smuzhiyun debug("UART init failed\n");
162*4882a593Smuzhiyun return err;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun return err;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun #endif
167