1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2008-2009 Samsung Electronics
3*4882a593Smuzhiyun * Minkyu Kang <mk7.kang@samsung.com>
4*4882a593Smuzhiyun * Kyungmin Park <kyungmin.park@samsung.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/gpio.h>
11*4882a593Smuzhiyun #include <asm/arch/mmc.h>
12*4882a593Smuzhiyun #include <dm.h>
13*4882a593Smuzhiyun #include <power/pmic.h>
14*4882a593Smuzhiyun #include <usb/dwc2_udc.h>
15*4882a593Smuzhiyun #include <asm/arch/cpu.h>
16*4882a593Smuzhiyun #include <power/max8998_pmic.h>
17*4882a593Smuzhiyun #include <samsung/misc.h>
18*4882a593Smuzhiyun #include <usb.h>
19*4882a593Smuzhiyun #include <usb_mass_storage.h>
20*4882a593Smuzhiyun #include <asm/mach-types.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
23*4882a593Smuzhiyun
get_board_rev(void)24*4882a593Smuzhiyun u32 get_board_rev(void)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun return 0;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
board_init(void)29*4882a593Smuzhiyun int board_init(void)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun /* Set Initial global variables */
32*4882a593Smuzhiyun gd->bd->bi_arch_number = MACH_TYPE_GONI;
33*4882a593Smuzhiyun gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun return 0;
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #ifdef CONFIG_SYS_I2C_INIT_BOARD
i2c_init_board(void)39*4882a593Smuzhiyun void i2c_init_board(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun gpio_request(S5PC110_GPIO_J43, "i2c_clk");
42*4882a593Smuzhiyun gpio_request(S5PC110_GPIO_J40, "i2c_data");
43*4882a593Smuzhiyun gpio_direction_output(S5PC110_GPIO_J43, 1);
44*4882a593Smuzhiyun gpio_direction_output(S5PC110_GPIO_J40, 1);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun #endif
47*4882a593Smuzhiyun
dram_init(void)48*4882a593Smuzhiyun int dram_init(void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE +
51*4882a593Smuzhiyun PHYS_SDRAM_3_SIZE;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return 0;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
dram_init_banksize(void)56*4882a593Smuzhiyun int dram_init_banksize(void)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
59*4882a593Smuzhiyun gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
60*4882a593Smuzhiyun gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
61*4882a593Smuzhiyun gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
62*4882a593Smuzhiyun gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
63*4882a593Smuzhiyun gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun return 0;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #ifdef CONFIG_DISPLAY_BOARDINFO
checkboard(void)69*4882a593Smuzhiyun int checkboard(void)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun puts("Board:\tGoni\n");
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun #endif
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #ifdef CONFIG_MMC
board_mmc_init(bd_t * bis)77*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun int i, ret, ret_sd = 0;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
82*4882a593Smuzhiyun gpio_request(S5PC110_GPIO_J27, "massmemory_en");
83*4882a593Smuzhiyun gpio_direction_output(S5PC110_GPIO_J27, 1);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * MMC0 GPIO
87*4882a593Smuzhiyun * GPG0[0] SD_0_CLK
88*4882a593Smuzhiyun * GPG0[1] SD_0_CMD
89*4882a593Smuzhiyun * GPG0[2] SD_0_CDn -> Not used
90*4882a593Smuzhiyun * GPG0[3:6] SD_0_DATA[0:3]
91*4882a593Smuzhiyun */
92*4882a593Smuzhiyun for (i = S5PC110_GPIO_G00; i < S5PC110_GPIO_G07; i++) {
93*4882a593Smuzhiyun if (i == S5PC110_GPIO_G02)
94*4882a593Smuzhiyun continue;
95*4882a593Smuzhiyun /* GPG0[0:6] special function 2 */
96*4882a593Smuzhiyun gpio_cfg_pin(i, 0x2);
97*4882a593Smuzhiyun /* GPG0[0:6] pull disable */
98*4882a593Smuzhiyun gpio_set_pull(i, S5P_GPIO_PULL_NONE);
99*4882a593Smuzhiyun /* GPG0[0:6] drv 4x */
100*4882a593Smuzhiyun gpio_set_drv(i, S5P_GPIO_DRV_4X);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun ret = s5p_mmc_init(0, 4);
104*4882a593Smuzhiyun if (ret)
105*4882a593Smuzhiyun pr_err("MMC: Failed to init MMC:0.\n");
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /*
108*4882a593Smuzhiyun * SD card (T_FLASH) detect and init
109*4882a593Smuzhiyun * T_FLASH_DETECT: EINT28: GPH3[4] input mode
110*4882a593Smuzhiyun */
111*4882a593Smuzhiyun gpio_request(S5PC110_GPIO_H34, "t_flash_detect");
112*4882a593Smuzhiyun gpio_cfg_pin(S5PC110_GPIO_H34, S5P_GPIO_INPUT);
113*4882a593Smuzhiyun gpio_set_pull(S5PC110_GPIO_H34, S5P_GPIO_PULL_UP);
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (!gpio_get_value(S5PC110_GPIO_H34)) {
116*4882a593Smuzhiyun for (i = S5PC110_GPIO_G20; i < S5PC110_GPIO_G27; i++) {
117*4882a593Smuzhiyun if (i == S5PC110_GPIO_G22)
118*4882a593Smuzhiyun continue;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* GPG2[0:6] special function 2 */
121*4882a593Smuzhiyun gpio_cfg_pin(i, 0x2);
122*4882a593Smuzhiyun /* GPG2[0:6] pull disable */
123*4882a593Smuzhiyun gpio_set_pull(i, S5P_GPIO_PULL_NONE);
124*4882a593Smuzhiyun /* GPG2[0:6] drv 4x */
125*4882a593Smuzhiyun gpio_set_drv(i, S5P_GPIO_DRV_4X);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun ret_sd = s5p_mmc_init(2, 4);
129*4882a593Smuzhiyun if (ret_sd)
130*4882a593Smuzhiyun pr_err("MMC: Failed to init SD card (MMC:2).\n");
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun return ret & ret_sd;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun #endif
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun #ifdef CONFIG_USB_GADGET
s5pc1xx_phy_control(int on)138*4882a593Smuzhiyun static int s5pc1xx_phy_control(int on)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun struct udevice *dev;
141*4882a593Smuzhiyun static int status;
142*4882a593Smuzhiyun int reg, ret;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ret = pmic_get("max8998-pmic", &dev);
145*4882a593Smuzhiyun if (ret)
146*4882a593Smuzhiyun return ret;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (on && !status) {
149*4882a593Smuzhiyun reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
150*4882a593Smuzhiyun reg |= MAX8998_LDO3;
151*4882a593Smuzhiyun ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
152*4882a593Smuzhiyun if (ret) {
153*4882a593Smuzhiyun puts("MAX8998 LDO setting error!\n");
154*4882a593Smuzhiyun return -EINVAL;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
158*4882a593Smuzhiyun reg |= MAX8998_LDO8;
159*4882a593Smuzhiyun ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
160*4882a593Smuzhiyun if (ret) {
161*4882a593Smuzhiyun puts("MAX8998 LDO setting error!\n");
162*4882a593Smuzhiyun return -EINVAL;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun status = 1;
165*4882a593Smuzhiyun } else if (!on && status) {
166*4882a593Smuzhiyun reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
167*4882a593Smuzhiyun reg &= ~MAX8998_LDO3;
168*4882a593Smuzhiyun ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
169*4882a593Smuzhiyun if (ret) {
170*4882a593Smuzhiyun puts("MAX8998 LDO setting error!\n");
171*4882a593Smuzhiyun return -EINVAL;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
175*4882a593Smuzhiyun reg &= ~MAX8998_LDO8;
176*4882a593Smuzhiyun ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
177*4882a593Smuzhiyun if (ret) {
178*4882a593Smuzhiyun puts("MAX8998 LDO setting error!\n");
179*4882a593Smuzhiyun return -EINVAL;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun status = 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun udelay(10000);
184*4882a593Smuzhiyun return 0;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun struct dwc2_plat_otg_data s5pc110_otg_data = {
188*4882a593Smuzhiyun .phy_control = s5pc1xx_phy_control,
189*4882a593Smuzhiyun .regs_phy = S5PC110_PHY_BASE,
190*4882a593Smuzhiyun .regs_otg = S5PC110_OTG_BASE,
191*4882a593Smuzhiyun .usb_phy_ctrl = S5PC110_USB_PHY_CONTROL,
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun
board_usb_init(int index,enum usb_init_type init)194*4882a593Smuzhiyun int board_usb_init(int index, enum usb_init_type init)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun debug("USB_udc_probe\n");
197*4882a593Smuzhiyun return dwc2_udc_probe(&s5pc110_otg_data);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun #endif
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun #ifdef CONFIG_MISC_INIT_R
misc_init_r(void)202*4882a593Smuzhiyun int misc_init_r(void)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
205*4882a593Smuzhiyun set_board_info();
206*4882a593Smuzhiyun #endif
207*4882a593Smuzhiyun return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun #endif
210*4882a593Smuzhiyun
board_usb_cleanup(int index,enum usb_init_type init)211*4882a593Smuzhiyun int board_usb_cleanup(int index, enum usb_init_type init)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215