xref: /OK3568_Linux_fs/u-boot/board/samsung/common/exynos5-dt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2012 Samsung Electronics
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <dwc3-uboot.h>
10*4882a593Smuzhiyun #include <fdtdec.h>
11*4882a593Smuzhiyun #include <asm/io.h>
12*4882a593Smuzhiyun #include <errno.h>
13*4882a593Smuzhiyun #include <i2c.h>
14*4882a593Smuzhiyun #include <mmc.h>
15*4882a593Smuzhiyun #include <netdev.h>
16*4882a593Smuzhiyun #include <samsung-usb-phy-uboot.h>
17*4882a593Smuzhiyun #include <spi.h>
18*4882a593Smuzhiyun #include <usb.h>
19*4882a593Smuzhiyun #include <video_bridge.h>
20*4882a593Smuzhiyun #include <asm/gpio.h>
21*4882a593Smuzhiyun #include <asm/arch/cpu.h>
22*4882a593Smuzhiyun #include <asm/arch/dwmmc.h>
23*4882a593Smuzhiyun #include <asm/arch/mmc.h>
24*4882a593Smuzhiyun #include <asm/arch/pinmux.h>
25*4882a593Smuzhiyun #include <asm/arch/power.h>
26*4882a593Smuzhiyun #include <asm/arch/sromc.h>
27*4882a593Smuzhiyun #include <power/pmic.h>
28*4882a593Smuzhiyun #include <power/max77686_pmic.h>
29*4882a593Smuzhiyun #include <power/regulator.h>
30*4882a593Smuzhiyun #include <power/s2mps11.h>
31*4882a593Smuzhiyun #include <power/s5m8767.h>
32*4882a593Smuzhiyun #include <samsung/exynos5-dt-types.h>
33*4882a593Smuzhiyun #include <samsung/misc.h>
34*4882a593Smuzhiyun #include <tmu.h>
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
37*4882a593Smuzhiyun 
board_enable_audio_codec(void)38*4882a593Smuzhiyun static void board_enable_audio_codec(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	int node, ret;
41*4882a593Smuzhiyun 	struct gpio_desc en_gpio;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	node = fdtdec_next_compatible(gd->fdt_blob, 0,
44*4882a593Smuzhiyun 		COMPAT_SAMSUNG_EXYNOS5_SOUND);
45*4882a593Smuzhiyun 	if (node <= 0)
46*4882a593Smuzhiyun 		return;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
49*4882a593Smuzhiyun 					 "codec-enable-gpio", 0, &en_gpio,
50*4882a593Smuzhiyun 					 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
51*4882a593Smuzhiyun 	if (ret == -FDT_ERR_NOTFOUND)
52*4882a593Smuzhiyun 		return;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* Turn on the GPIO which connects to the codec's "enable" line. */
55*4882a593Smuzhiyun 	gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #ifdef CONFIG_SOUND_MAX98095
58*4882a593Smuzhiyun 	/* Enable MAX98095 Codec */
59*4882a593Smuzhiyun 	gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
60*4882a593Smuzhiyun 	gpio_direction_output(EXYNOS5_GPIO_X17, 1);
61*4882a593Smuzhiyun 	gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
62*4882a593Smuzhiyun #endif
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun 
exynos_init(void)65*4882a593Smuzhiyun int exynos_init(void)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	board_enable_audio_codec();
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	return 0;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
exynos_set_regulator(const char * name,uint uv)72*4882a593Smuzhiyun static int exynos_set_regulator(const char *name, uint uv)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct udevice *dev;
75*4882a593Smuzhiyun 	int ret;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	ret = regulator_get_by_platname(name, &dev);
78*4882a593Smuzhiyun 	if (ret) {
79*4882a593Smuzhiyun 		debug("%s: Cannot find regulator %s\n", __func__, name);
80*4882a593Smuzhiyun 		return ret;
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 	ret = regulator_set_value(dev, uv);
83*4882a593Smuzhiyun 	if (ret) {
84*4882a593Smuzhiyun 		debug("%s: Cannot set regulator %s\n", __func__, name);
85*4882a593Smuzhiyun 		return ret;
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
exynos_power_init(void)91*4882a593Smuzhiyun int exynos_power_init(void)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct udevice *dev;
94*4882a593Smuzhiyun 	int ret;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	ret = pmic_get("max77686", &dev);
97*4882a593Smuzhiyun 	if (!ret) {
98*4882a593Smuzhiyun 		/* TODO(sjg@chromium.org): Move into the clock/pmic API */
99*4882a593Smuzhiyun 		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
100*4882a593Smuzhiyun 				MAX77686_32KHCP_EN);
101*4882a593Smuzhiyun 		if (ret)
102*4882a593Smuzhiyun 			return ret;
103*4882a593Smuzhiyun 		ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
104*4882a593Smuzhiyun 				MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
105*4882a593Smuzhiyun 		if (ret)
106*4882a593Smuzhiyun 			return ret;
107*4882a593Smuzhiyun 	} else {
108*4882a593Smuzhiyun 		ret = pmic_get("s5m8767-pmic", &dev);
109*4882a593Smuzhiyun 		/* TODO(sjg@chromium.org): Use driver model to access clock */
110*4882a593Smuzhiyun #ifdef CONFIG_PMIC_S5M8767
111*4882a593Smuzhiyun 		if (!ret)
112*4882a593Smuzhiyun 			s5m8767_enable_32khz_cp(dev);
113*4882a593Smuzhiyun #endif
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 	if (ret == -ENODEV)
116*4882a593Smuzhiyun 		return 0;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	ret = regulators_enable_boot_on(false);
119*4882a593Smuzhiyun 	if (ret)
120*4882a593Smuzhiyun 		return ret;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	ret = exynos_set_regulator("vdd_mif", 1100000);
123*4882a593Smuzhiyun 	if (ret)
124*4882a593Smuzhiyun 		return ret;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ret = exynos_set_regulator("vdd_arm", 1300000);
127*4882a593Smuzhiyun 	if (ret)
128*4882a593Smuzhiyun 		return ret;
129*4882a593Smuzhiyun 	ret = exynos_set_regulator("vdd_int", 1012500);
130*4882a593Smuzhiyun 	if (ret)
131*4882a593Smuzhiyun 		return ret;
132*4882a593Smuzhiyun 	ret = exynos_set_regulator("vdd_g3d", 1200000);
133*4882a593Smuzhiyun 	if (ret)
134*4882a593Smuzhiyun 		return ret;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun 
board_get_revision(void)139*4882a593Smuzhiyun int board_get_revision(void)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	return 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #ifdef CONFIG_USB_DWC3
145*4882a593Smuzhiyun static struct dwc3_device dwc3_device_data = {
146*4882a593Smuzhiyun 	.maximum_speed = USB_SPEED_SUPER,
147*4882a593Smuzhiyun 	.base = 0x12400000,
148*4882a593Smuzhiyun 	.dr_mode = USB_DR_MODE_PERIPHERAL,
149*4882a593Smuzhiyun 	.index = 0,
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
usb_gadget_handle_interrupts(void)152*4882a593Smuzhiyun int usb_gadget_handle_interrupts(void)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	dwc3_uboot_handle_interrupt(0);
155*4882a593Smuzhiyun 	return 0;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun 
board_usb_init(int index,enum usb_init_type init)158*4882a593Smuzhiyun int board_usb_init(int index, enum usb_init_type init)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
161*4882a593Smuzhiyun 		samsung_get_base_usb3_phy();
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if (!phy) {
164*4882a593Smuzhiyun 		pr_err("usb3 phy not supported");
165*4882a593Smuzhiyun 		return -ENODEV;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
169*4882a593Smuzhiyun 	exynos5_usb3_phy_init(phy);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	return dwc3_uboot_init(&dwc3_device_data);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun #endif
174*4882a593Smuzhiyun #ifdef CONFIG_SET_DFU_ALT_INFO
get_dfu_alt_system(char * interface,char * devstr)175*4882a593Smuzhiyun char *get_dfu_alt_system(char *interface, char *devstr)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	char *info = "Not supported!";
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	if (board_is_odroidxu4())
180*4882a593Smuzhiyun 		return info;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	return env_get("dfu_alt_system");
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
get_dfu_alt_boot(char * interface,char * devstr)185*4882a593Smuzhiyun char *get_dfu_alt_boot(char *interface, char *devstr)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	char *info = "Not supported!";
188*4882a593Smuzhiyun 	struct mmc *mmc;
189*4882a593Smuzhiyun 	char *alt_boot;
190*4882a593Smuzhiyun 	int dev_num;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	if (board_is_odroidxu4())
193*4882a593Smuzhiyun 		return info;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	dev_num = simple_strtoul(devstr, NULL, 10);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	mmc = find_mmc_device(dev_num);
198*4882a593Smuzhiyun 	if (!mmc)
199*4882a593Smuzhiyun 		return NULL;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (mmc_init(mmc))
202*4882a593Smuzhiyun 		return NULL;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (IS_SD(mmc))
205*4882a593Smuzhiyun 		alt_boot = CONFIG_DFU_ALT_BOOT_SD;
206*4882a593Smuzhiyun 	else
207*4882a593Smuzhiyun 		alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	return alt_boot;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun #endif
212