1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 2022 Rockchip Electronics Co., Ltd
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/io.h>
9*4882a593Smuzhiyun #include <dwc3-uboot.h>
10*4882a593Smuzhiyun #include <usb.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #ifdef CONFIG_USB_DWC3
15*4882a593Smuzhiyun static struct dwc3_device dwc3_device_data = {
16*4882a593Smuzhiyun .maximum_speed = USB_SPEED_HIGH,
17*4882a593Smuzhiyun .base = 0xffb00000,
18*4882a593Smuzhiyun .dr_mode = USB_DR_MODE_PERIPHERAL,
19*4882a593Smuzhiyun .index = 0,
20*4882a593Smuzhiyun .dis_u2_susphy_quirk = 1,
21*4882a593Smuzhiyun .usb2_phyif_utmi_width = 16,
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
usb_gadget_handle_interrupts(void)24*4882a593Smuzhiyun int usb_gadget_handle_interrupts(void)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun dwc3_uboot_handle_interrupt(0);
27*4882a593Smuzhiyun return 0;
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
board_usb_init(int index,enum usb_init_type init)30*4882a593Smuzhiyun int board_usb_init(int index, enum usb_init_type init)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun writel(0x01ff0000, 0xff000050); /* Resume usb2 phy to normal mode */
33*4882a593Smuzhiyun return dwc3_uboot_init(&dwc3_device_data);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun #endif
36