xref: /OK3568_Linux_fs/u-boot/board/renesas/sh7785lcr/rtl8169_mac.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include "rtl8169.h"
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun static unsigned char *PCI_MEMR;
11*4882a593Smuzhiyun 
mac_delay(unsigned int cnt)12*4882a593Smuzhiyun static void mac_delay(unsigned int cnt)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun 	udelay(cnt);
15*4882a593Smuzhiyun }
16*4882a593Smuzhiyun 
mac_pci_setup(void)17*4882a593Smuzhiyun static void mac_pci_setup(void)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun 	unsigned long pci_data;
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun 	PCI_PAR = 0x00000010;
22*4882a593Smuzhiyun 	PCI_PDR = 0x00001000;
23*4882a593Smuzhiyun 	PCI_PAR = 0x00000004;
24*4882a593Smuzhiyun 	pci_data = PCI_PDR;
25*4882a593Smuzhiyun 	PCI_PDR = pci_data | 0x00000007;
26*4882a593Smuzhiyun 	PCI_PAR = 0x00000010;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	PCI_MEMR = (unsigned char *)((PCI_PDR | 0xFE240050) & 0xFFFFFFF0);
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun 
EECS(int level)31*4882a593Smuzhiyun static void EECS(int level)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	unsigned char data = *PCI_MEMR;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	if (level)
36*4882a593Smuzhiyun 		*PCI_MEMR = data | 0x08;
37*4882a593Smuzhiyun 	else
38*4882a593Smuzhiyun 		*PCI_MEMR = data & 0xf7;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
EECLK(int level)41*4882a593Smuzhiyun static void EECLK(int level)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	unsigned char data = *PCI_MEMR;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	if (level)
46*4882a593Smuzhiyun 		*PCI_MEMR = data | 0x04;
47*4882a593Smuzhiyun 	else
48*4882a593Smuzhiyun 		*PCI_MEMR = data & 0xfb;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun 
EEDI(int level)51*4882a593Smuzhiyun static void EEDI(int level)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	unsigned char data = *PCI_MEMR;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	if (level)
56*4882a593Smuzhiyun 		*PCI_MEMR = data | 0x02;
57*4882a593Smuzhiyun 	else
58*4882a593Smuzhiyun 		*PCI_MEMR = data & 0xfd;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
sh7785lcr_bitset(unsigned short bit)61*4882a593Smuzhiyun static inline void sh7785lcr_bitset(unsigned short bit)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	if (bit)
64*4882a593Smuzhiyun 		EEDI(HIGH);
65*4882a593Smuzhiyun 	else
66*4882a593Smuzhiyun 		EEDI(LOW);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	EECLK(LOW);
69*4882a593Smuzhiyun 	mac_delay(TIME1);
70*4882a593Smuzhiyun 	EECLK(HIGH);
71*4882a593Smuzhiyun 	mac_delay(TIME1);
72*4882a593Smuzhiyun 	EEDI(LOW);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
sh7785lcr_bitget(void)75*4882a593Smuzhiyun static inline unsigned char sh7785lcr_bitget(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	unsigned char bit;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	EECLK(LOW);
80*4882a593Smuzhiyun 	mac_delay(TIME1);
81*4882a593Smuzhiyun 	bit = *PCI_MEMR & 0x01;
82*4882a593Smuzhiyun 	EECLK(HIGH);
83*4882a593Smuzhiyun 	mac_delay(TIME1);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	return bit;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
sh7785lcr_setcmd(unsigned char command)88*4882a593Smuzhiyun static inline void sh7785lcr_setcmd(unsigned char command)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	sh7785lcr_bitset(BIT_DUMMY);
91*4882a593Smuzhiyun 	switch (command) {
92*4882a593Smuzhiyun 	case MAC_EEP_READ:
93*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
94*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
95*4882a593Smuzhiyun 		sh7785lcr_bitset(0);
96*4882a593Smuzhiyun 		break;
97*4882a593Smuzhiyun 	case MAC_EEP_WRITE:
98*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
99*4882a593Smuzhiyun 		sh7785lcr_bitset(0);
100*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
101*4882a593Smuzhiyun 		break;
102*4882a593Smuzhiyun 	case MAC_EEP_ERACE:
103*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
104*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
105*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
106*4882a593Smuzhiyun 		break;
107*4882a593Smuzhiyun 	case MAC_EEP_EWEN:
108*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
109*4882a593Smuzhiyun 		sh7785lcr_bitset(0);
110*4882a593Smuzhiyun 		sh7785lcr_bitset(0);
111*4882a593Smuzhiyun 		break;
112*4882a593Smuzhiyun 	case MAC_EEP_EWDS:
113*4882a593Smuzhiyun 		sh7785lcr_bitset(1);
114*4882a593Smuzhiyun 		sh7785lcr_bitset(0);
115*4882a593Smuzhiyun 		sh7785lcr_bitset(0);
116*4882a593Smuzhiyun 		break;
117*4882a593Smuzhiyun 	default:
118*4882a593Smuzhiyun 		break;
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
sh7785lcr_getdt(void)122*4882a593Smuzhiyun static inline unsigned short sh7785lcr_getdt(void)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	unsigned short data = 0;
125*4882a593Smuzhiyun 	int i;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	sh7785lcr_bitget();			/* DUMMY */
128*4882a593Smuzhiyun 	for (i = 0 ; i < 16 ; i++) {
129*4882a593Smuzhiyun 		data <<= 1;
130*4882a593Smuzhiyun 		data |= sh7785lcr_bitget();
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun 	return data;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
sh7785lcr_setadd(unsigned short address)135*4882a593Smuzhiyun static inline void sh7785lcr_setadd(unsigned short address)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	sh7785lcr_bitset(address & 0x0020);	/* A5 */
138*4882a593Smuzhiyun 	sh7785lcr_bitset(address & 0x0010);	/* A4 */
139*4882a593Smuzhiyun 	sh7785lcr_bitset(address & 0x0008);	/* A3 */
140*4882a593Smuzhiyun 	sh7785lcr_bitset(address & 0x0004);	/* A2 */
141*4882a593Smuzhiyun 	sh7785lcr_bitset(address & 0x0002);	/* A1 */
142*4882a593Smuzhiyun 	sh7785lcr_bitset(address & 0x0001);	/* A0 */
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
sh7785lcr_setdata(unsigned short data)145*4882a593Smuzhiyun static inline void sh7785lcr_setdata(unsigned short data)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x8000);
148*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x4000);
149*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x2000);
150*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x1000);
151*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0800);
152*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0400);
153*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0200);
154*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0100);
155*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0080);
156*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0040);
157*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0020);
158*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0010);
159*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0008);
160*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0004);
161*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0002);
162*4882a593Smuzhiyun 	sh7785lcr_bitset(data & 0x0001);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
sh7785lcr_datawrite(const unsigned short * data,unsigned short address,unsigned int count)165*4882a593Smuzhiyun static void sh7785lcr_datawrite(const unsigned short *data, unsigned short address,
166*4882a593Smuzhiyun 			 unsigned int count)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	unsigned int i;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
171*4882a593Smuzhiyun 		EECS(HIGH);
172*4882a593Smuzhiyun 		EEDI(LOW);
173*4882a593Smuzhiyun 		mac_delay(TIME1);
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 		sh7785lcr_setcmd(MAC_EEP_WRITE);
176*4882a593Smuzhiyun 		sh7785lcr_setadd(address++);
177*4882a593Smuzhiyun 		sh7785lcr_setdata(*(data + i));
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 		EECLK(LOW);
180*4882a593Smuzhiyun 		EEDI(LOW);
181*4882a593Smuzhiyun 		EECS(LOW);
182*4882a593Smuzhiyun 		mac_delay(TIME2);
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
sh7785lcr_macerase(void)186*4882a593Smuzhiyun static void sh7785lcr_macerase(void)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	unsigned int i;
189*4882a593Smuzhiyun 	unsigned short pci_address = 7;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	for (i = 0; i < 3; i++) {
192*4882a593Smuzhiyun 		EECS(HIGH);
193*4882a593Smuzhiyun 		EEDI(LOW);
194*4882a593Smuzhiyun 		mac_delay(TIME1);
195*4882a593Smuzhiyun 		sh7785lcr_setcmd(MAC_EEP_ERACE);
196*4882a593Smuzhiyun 		sh7785lcr_setadd(pci_address++);
197*4882a593Smuzhiyun 		mac_delay(TIME1);
198*4882a593Smuzhiyun 		EECLK(LOW);
199*4882a593Smuzhiyun 		EEDI(LOW);
200*4882a593Smuzhiyun 		EECS(LOW);
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	mac_delay(TIME2);
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	printf("\n\nErace End\n");
206*4882a593Smuzhiyun 	for (i = 0; i < 10; i++)
207*4882a593Smuzhiyun 		mac_delay(TIME2);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
sh7785lcr_macwrite(unsigned short * data)210*4882a593Smuzhiyun static void sh7785lcr_macwrite(unsigned short *data)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	sh7785lcr_macerase();
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	sh7785lcr_datawrite(EEPROM_W_Data_8169_A, 0x0000, 7);
215*4882a593Smuzhiyun 	sh7785lcr_datawrite(data, PCI_EEP_ADDRESS, PCI_MAC_ADDRESS_SIZE);
216*4882a593Smuzhiyun 	sh7785lcr_datawrite(EEPROM_W_Data_8169_B, 0x000a, 54);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
sh7785lcr_macdtrd(unsigned char * buf,unsigned short address,unsigned int count)219*4882a593Smuzhiyun void sh7785lcr_macdtrd(unsigned char *buf, unsigned short address, unsigned int count)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	unsigned int i;
222*4882a593Smuzhiyun 	unsigned short wk;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	for (i = 0 ; i < count; i++) {
225*4882a593Smuzhiyun 		EECS(HIGH);
226*4882a593Smuzhiyun 		EEDI(LOW);
227*4882a593Smuzhiyun 		mac_delay(TIME1);
228*4882a593Smuzhiyun 		sh7785lcr_setcmd(MAC_EEP_READ);
229*4882a593Smuzhiyun 		sh7785lcr_setadd(address++);
230*4882a593Smuzhiyun 		wk = sh7785lcr_getdt();
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 		*buf++ = (unsigned char)(wk & 0xff);
233*4882a593Smuzhiyun 		*buf++ = (unsigned char)((wk >> 8) & 0xff);
234*4882a593Smuzhiyun 		EECLK(LOW);
235*4882a593Smuzhiyun 		EEDI(LOW);
236*4882a593Smuzhiyun 		EECS(LOW);
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
sh7785lcr_macadrd(unsigned char * buf)240*4882a593Smuzhiyun static void sh7785lcr_macadrd(unsigned char *buf)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	*PCI_MEMR = PCI_PROG;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	sh7785lcr_macdtrd(buf, PCI_EEP_ADDRESS, PCI_MAC_ADDRESS_SIZE);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
sh7785lcr_eepewen(void)247*4882a593Smuzhiyun static void sh7785lcr_eepewen(void)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun 	*PCI_MEMR = PCI_PROG;
250*4882a593Smuzhiyun 	mac_delay(TIME1);
251*4882a593Smuzhiyun 	EECS(LOW);
252*4882a593Smuzhiyun 	EECLK(LOW);
253*4882a593Smuzhiyun 	EEDI(LOW);
254*4882a593Smuzhiyun 	EECS(HIGH);
255*4882a593Smuzhiyun 	mac_delay(TIME1);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	sh7785lcr_setcmd(MAC_EEP_EWEN);
258*4882a593Smuzhiyun 	sh7785lcr_bitset(1);
259*4882a593Smuzhiyun 	sh7785lcr_bitset(1);
260*4882a593Smuzhiyun 	sh7785lcr_bitset(BIT_DUMMY);
261*4882a593Smuzhiyun 	sh7785lcr_bitset(BIT_DUMMY);
262*4882a593Smuzhiyun 	sh7785lcr_bitset(BIT_DUMMY);
263*4882a593Smuzhiyun 	sh7785lcr_bitset(BIT_DUMMY);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	EECLK(LOW);
266*4882a593Smuzhiyun 	EEDI(LOW);
267*4882a593Smuzhiyun 	EECS(LOW);
268*4882a593Smuzhiyun 	mac_delay(TIME1);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
mac_write(unsigned short * data)271*4882a593Smuzhiyun void mac_write(unsigned short *data)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	mac_pci_setup();
274*4882a593Smuzhiyun 	sh7785lcr_eepewen();
275*4882a593Smuzhiyun 	sh7785lcr_macwrite(data);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
mac_read(void)278*4882a593Smuzhiyun void mac_read(void)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun 	unsigned char data[6];
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	mac_pci_setup();
283*4882a593Smuzhiyun 	sh7785lcr_macadrd(data);
284*4882a593Smuzhiyun 	printf("Mac = %02x:%02x:%02x:%02x:%02x:%02x\n",
285*4882a593Smuzhiyun 		data[0], data[1], data[2], data[3], data[4], data[5]);
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun 
do_set_mac(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])288*4882a593Smuzhiyun int do_set_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun 	int i;
291*4882a593Smuzhiyun 	unsigned char mac[6];
292*4882a593Smuzhiyun 	char *s, *e;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	if (argc != 2)
295*4882a593Smuzhiyun 		return cmd_usage(cmdtp);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	s = argv[1];
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	for (i = 0; i < 6; i++) {
300*4882a593Smuzhiyun 		mac[i] = s ? simple_strtoul(s, &e, 16) : 0;
301*4882a593Smuzhiyun 		if (s)
302*4882a593Smuzhiyun 			s = (*e) ? e + 1 : e;
303*4882a593Smuzhiyun 	}
304*4882a593Smuzhiyun 	mac_write((unsigned short *)mac);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	return 0;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun U_BOOT_CMD(
310*4882a593Smuzhiyun 	setmac,	2,	1,	do_set_mac,
311*4882a593Smuzhiyun 	"write MAC address for RTL8110SCL",
312*4882a593Smuzhiyun 	"\n"
313*4882a593Smuzhiyun 	"setmac <mac address> - write MAC address for RTL8110SCL"
314*4882a593Smuzhiyun );
315*4882a593Smuzhiyun 
do_print_mac(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])316*4882a593Smuzhiyun int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun 	if (argc != 1)
319*4882a593Smuzhiyun 		return cmd_usage(cmdtp);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	mac_read();
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	return 0;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun U_BOOT_CMD(
327*4882a593Smuzhiyun 	printmac,	1,	1,	do_print_mac,
328*4882a593Smuzhiyun 	"print MAC address for RTL8110",
329*4882a593Smuzhiyun 	"\n"
330*4882a593Smuzhiyun 	"    - print MAC address for RTL8110"
331*4882a593Smuzhiyun );
332