1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 3*4882a593Smuzhiyun * Copyright (C) 2011 Renesas Solutions Corp. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <common.h> 9*4882a593Smuzhiyun #include <asm/io.h> 10*4882a593Smuzhiyun #include <asm/processor.h> 11*4882a593Smuzhiyun #include <netdev.h> 12*4882a593Smuzhiyun #include <i2c.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define MODEMR (0xFFCC0020) 15*4882a593Smuzhiyun #define MODEMR_MASK (0x6) 16*4882a593Smuzhiyun #define MODEMR_533MHZ (0x2) 17*4882a593Smuzhiyun checkboard(void)18*4882a593Smuzhiyunint checkboard(void) 19*4882a593Smuzhiyun { 20*4882a593Smuzhiyun u32 r = readl(MODEMR); 21*4882a593Smuzhiyun if ((r & MODEMR_MASK) & MODEMR_533MHZ) 22*4882a593Smuzhiyun puts("CPU Clock: 533MHz\n"); 23*4882a593Smuzhiyun else 24*4882a593Smuzhiyun puts("CPU Clock: 400MHz\n"); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun puts("BOARD: Renesas Technology Corp. R0P7734C00000RZ\n"); 27*4882a593Smuzhiyun return 0; 28*4882a593Smuzhiyun } 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define MSTPSR1 (0xFFC80044) 31*4882a593Smuzhiyun #define MSTPCR1 (0xFFC80034) 32*4882a593Smuzhiyun #define MSTPSR1_GETHER (1 << 14) 33*4882a593Smuzhiyun board_init(void)34*4882a593Smuzhiyunint board_init(void) 35*4882a593Smuzhiyun { 36*4882a593Smuzhiyun #if defined(CONFIG_SH_ETHER) 37*4882a593Smuzhiyun u32 r = readl(MSTPSR1); 38*4882a593Smuzhiyun if (r & MSTPSR1_GETHER) 39*4882a593Smuzhiyun writel((r & ~MSTPSR1_GETHER), MSTPCR1); 40*4882a593Smuzhiyun #endif 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun return 0; 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun board_late_init(void)45*4882a593Smuzhiyunint board_late_init(void) 46*4882a593Smuzhiyun { 47*4882a593Smuzhiyun printf("Cannot get MAC address from I2C\n"); 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun return 0; 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #ifdef CONFIG_SMC911X board_eth_init(bd_t * bis)53*4882a593Smuzhiyunint board_eth_init(bd_t *bis) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun int rc = 0; 56*4882a593Smuzhiyun rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); 57*4882a593Smuzhiyun return rc; 58*4882a593Smuzhiyun } 59*4882a593Smuzhiyun #endif 60