1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 3*4882a593Smuzhiyun * Copyright (C) 2011 Renesas Solutions Corp. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun#include <config.h> 8*4882a593Smuzhiyun#include <asm/processor.h> 9*4882a593Smuzhiyun#include <asm/macro.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include <asm/processor.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun .global lowlevel_init 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun .text 16*4882a593Smuzhiyun .align 2 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunlowlevel_init: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* WDT */ 21*4882a593Smuzhiyun write32 WDTCSR_A, WDTCSR_D 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* MMU */ 24*4882a593Smuzhiyun write32 MMUCR_A, MMUCR_D 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun write32 FRQCR2_A, FRQCR2_D 27*4882a593Smuzhiyun write32 FRQCR0_A, FRQCR0_D 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun write32 CS0CTRL_A, CS0CTRL_D 30*4882a593Smuzhiyun write32 CS1CTRL_A, CS1CTRL_D 31*4882a593Smuzhiyun write32 CS0CTRL2_A, CS0CTRL2_D 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun write32 CSPWCR0_A, CSPWCR0_D 34*4882a593Smuzhiyun write32 CSPWCR1_A, CSPWCR1_D 35*4882a593Smuzhiyun write32 CS1GDST_A, CS1GDST_D 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun # clock mode check 38*4882a593Smuzhiyun mov.l MODEMR, r1 39*4882a593Smuzhiyun mov.l @r1, r0 40*4882a593Smuzhiyun and #6, r0 /* Check 1 and 2 bit.*/ 41*4882a593Smuzhiyun cmp/eq #2, r0 /* 0x02 is 533Mhz mode */ 42*4882a593Smuzhiyun bt init_lbsc_533 43*4882a593Smuzhiyun 44*4882a593Smuzhiyuninit_lbsc_400: 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun write32 CSWCR0_A, CSWCR0_D_400 47*4882a593Smuzhiyun write32 CSWCR1_A, CSWCR1_D 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun bra init_dbsc3_400_pad 50*4882a593Smuzhiyun nop 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun .align 2 53*4882a593Smuzhiyun 54*4882a593SmuzhiyunMODEMR: .long 0xFFCC0020 55*4882a593SmuzhiyunWDTCSR_A: .long 0xFFCC0004 56*4882a593SmuzhiyunWDTCSR_D: .long 0xA5000000 57*4882a593SmuzhiyunMMUCR_A: .long 0xFF000010 58*4882a593SmuzhiyunMMUCR_D: .long 0x00000004 59*4882a593Smuzhiyun 60*4882a593SmuzhiyunFRQCR2_A: .long 0xFFC80008 61*4882a593SmuzhiyunFRQCR2_D: .long 0x00000000 62*4882a593SmuzhiyunFRQCR0_A: .long 0xFFC80000 63*4882a593SmuzhiyunFRQCR0_D: .long 0xCF000001 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunCS0CTRL_A: .long 0xFF800200 66*4882a593SmuzhiyunCS0CTRL_D: .long 0x00000020 67*4882a593SmuzhiyunCS1CTRL_A: .long 0xFF800204 68*4882a593SmuzhiyunCS1CTRL_D: .long 0x00000020 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunCS0CTRL2_A: .long 0xFF800220 71*4882a593SmuzhiyunCS0CTRL2_D: .long 0x00004000 72*4882a593Smuzhiyun 73*4882a593SmuzhiyunCSPWCR0_A: .long 0xFF800280 74*4882a593SmuzhiyunCSPWCR0_D: .long 0x00000000 75*4882a593SmuzhiyunCSPWCR1_A: .long 0xFF800284 76*4882a593SmuzhiyunCSPWCR1_D: .long 0x00000000 77*4882a593SmuzhiyunCS1GDST_A: .long 0xFF8002C0 78*4882a593SmuzhiyunCS1GDST_D: .long 0x00000011 79*4882a593Smuzhiyun 80*4882a593Smuzhiyuninit_lbsc_533: 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun write32 CSWCR0_A, CSWCR0_D_533 83*4882a593Smuzhiyun write32 CSWCR1_A, CSWCR1_D 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun bra init_dbsc3_533_pad 86*4882a593Smuzhiyun nop 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun .align 2 89*4882a593Smuzhiyun 90*4882a593SmuzhiyunCSWCR0_A: .long 0xFF800230 91*4882a593SmuzhiyunCSWCR0_D_533: .long 0x01120104 92*4882a593SmuzhiyunCSWCR0_D_400: .long 0x02120114 93*4882a593Smuzhiyun/* CSWCR0_D_400: .long 0x01160116 */ 94*4882a593SmuzhiyunCSWCR1_A: .long 0xFF800234 95*4882a593SmuzhiyunCSWCR1_D: .long 0x077F077F 96*4882a593Smuzhiyun/* CSWCR1_D_400: .long 0x00120012 */ 97*4882a593Smuzhiyun 98*4882a593Smuzhiyuninit_dbsc3_400_pad: 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D 101*4882a593Smuzhiyun wait_timer WAIT_200US_400 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun write32 DBPDCNT0_A, DBPDCNT0_D_400 104*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D0 105*4882a593Smuzhiyun write32 DBPDCNT1_A, DBPDCNT1_D 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D1 108*4882a593Smuzhiyun wait_timer WAIT_32MCLK 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D2 111*4882a593Smuzhiyun wait_timer WAIT_100US_400 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D3 114*4882a593Smuzhiyun wait_timer WAIT_16MCLK 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D4 117*4882a593Smuzhiyun wait_timer WAIT_200US_400 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D5 120*4882a593Smuzhiyun wait_timer WAIT_1MCLK 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D6 123*4882a593Smuzhiyun wait_timer WAIT_10KMCLK 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun bra init_dbsc3_ctrl_400 126*4882a593Smuzhiyun nop 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun .align 2 129*4882a593Smuzhiyun 130*4882a593Smuzhiyuninit_dbsc3_533_pad: 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D 133*4882a593Smuzhiyun wait_timer WAIT_200US_533 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun write32 DBPDCNT0_A, DBPDCNT0_D_533 136*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D0 137*4882a593Smuzhiyun write32 DBPDCNT1_A, DBPDCNT1_D 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D1 140*4882a593Smuzhiyun wait_timer WAIT_32MCLK 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D2 143*4882a593Smuzhiyun wait_timer WAIT_100US_533 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D3 146*4882a593Smuzhiyun wait_timer WAIT_16MCLK 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D4 149*4882a593Smuzhiyun wait_timer WAIT_200US_533 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D5 152*4882a593Smuzhiyun wait_timer WAIT_1MCLK 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun write32 DBPDCNT3_A, DBPDCNT3_D6 155*4882a593Smuzhiyun wait_timer WAIT_10KMCLK 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun bra init_dbsc3_ctrl_533 158*4882a593Smuzhiyun nop 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun .align 2 161*4882a593Smuzhiyun 162*4882a593SmuzhiyunWAIT_200US_400: .long 40000 163*4882a593SmuzhiyunWAIT_200US_533: .long 53300 164*4882a593SmuzhiyunWAIT_100US_400: .long 20000 165*4882a593SmuzhiyunWAIT_100US_533: .long 26650 166*4882a593SmuzhiyunWAIT_32MCLK: .long 32 167*4882a593SmuzhiyunWAIT_16MCLK: .long 16 168*4882a593SmuzhiyunWAIT_1MCLK: .long 1 169*4882a593SmuzhiyunWAIT_10KMCLK: .long 10000 170*4882a593Smuzhiyun 171*4882a593SmuzhiyunDBPDCNT0_A: .long 0xFE800200 172*4882a593SmuzhiyunDBPDCNT0_D_533: .long 0x00010245 173*4882a593SmuzhiyunDBPDCNT0_D_400: .long 0x00010235 174*4882a593SmuzhiyunDBPDCNT1_A: .long 0xFE800204 175*4882a593SmuzhiyunDBPDCNT1_D: .long 0x00000014 176*4882a593SmuzhiyunDBPDCNT3_A: .long 0xFE80020C 177*4882a593SmuzhiyunDBPDCNT3_D: .long 0x80000000 178*4882a593SmuzhiyunDBPDCNT3_D0: .long 0x800F0000 179*4882a593SmuzhiyunDBPDCNT3_D1: .long 0x800F1000 180*4882a593SmuzhiyunDBPDCNT3_D2: .long 0x820F1000 181*4882a593SmuzhiyunDBPDCNT3_D3: .long 0x860F1000 182*4882a593SmuzhiyunDBPDCNT3_D4: .long 0x870F1000 183*4882a593SmuzhiyunDBPDCNT3_D5: .long 0x870F3000 184*4882a593SmuzhiyunDBPDCNT3_D6: .long 0x870F7000 185*4882a593Smuzhiyun 186*4882a593Smuzhiyuninit_dbsc3_ctrl_400: 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun write32 DBKIND_A, DBKIND_D 189*4882a593Smuzhiyun write32 DBCONF_A, DBCONF_D 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun write32 DBTR0_A, DBTR0_D_400 192*4882a593Smuzhiyun write32 DBTR1_A, DBTR1_D_400 193*4882a593Smuzhiyun write32 DBTR2_A, DBTR2_D 194*4882a593Smuzhiyun write32 DBTR3_A, DBTR3_D_400 195*4882a593Smuzhiyun write32 DBTR4_A, DBTR4_D_400 196*4882a593Smuzhiyun write32 DBTR5_A, DBTR5_D_400 197*4882a593Smuzhiyun write32 DBTR6_A, DBTR6_D_400 198*4882a593Smuzhiyun write32 DBTR7_A, DBTR7_D 199*4882a593Smuzhiyun write32 DBTR8_A, DBTR8_D_400 200*4882a593Smuzhiyun write32 DBTR9_A, DBTR9_D 201*4882a593Smuzhiyun write32 DBTR10_A, DBTR10_D_400 202*4882a593Smuzhiyun write32 DBTR11_A, DBTR11_D 203*4882a593Smuzhiyun write32 DBTR12_A, DBTR12_D_400 204*4882a593Smuzhiyun write32 DBTR13_A, DBTR13_D_400 205*4882a593Smuzhiyun write32 DBTR14_A, DBTR14_D 206*4882a593Smuzhiyun write32 DBTR15_A, DBTR15_D 207*4882a593Smuzhiyun write32 DBTR16_A, DBTR16_D_400 208*4882a593Smuzhiyun write32 DBTR17_A, DBTR17_D_400 209*4882a593Smuzhiyun write32 DBTR18_A, DBTR18_D_400 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun write32 DBBL_A, DBBL_D 212*4882a593Smuzhiyun write32 DBRNK0_A, DBRNK0_D 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D0_400 215*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D1 216*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D2 217*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D3 218*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D4 219*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D5_400 220*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D6 221*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D7 222*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D8 223*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D9_400 224*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D10 225*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D11 226*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D12 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun write32 DBBS0CNT1_A, DBBS0CNT1_D 229*4882a593Smuzhiyun write32 DBPDNCNF_A, DBPDNCNF_D 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun write32 DBRFCNF0_A, DBRFCNF0_D 232*4882a593Smuzhiyun write32 DBRFCNF1_A, DBRFCNF1_D_400 233*4882a593Smuzhiyun write32 DBRFCNF2_A, DBRFCNF2_D 234*4882a593Smuzhiyun write32 DBRFEN_A, DBRFEN_D 235*4882a593Smuzhiyun write32 DBACEN_A, DBACEN_D 236*4882a593Smuzhiyun write32 DBACEN_A, DBACEN_D 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun /* Dummy read */ 239*4882a593Smuzhiyun mov.l DBWAIT_A, r1 240*4882a593Smuzhiyun synco 241*4882a593Smuzhiyun mov.l @r1, r0 242*4882a593Smuzhiyun synco 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun /* Dummy read */ 245*4882a593Smuzhiyun mov.l SDRAM_A, r1 246*4882a593Smuzhiyun synco 247*4882a593Smuzhiyun mov.l @r1, r0 248*4882a593Smuzhiyun synco 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun /* need sleep 186A0 */ 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun bra init_pfc_sh7734 253*4882a593Smuzhiyun nop 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun .align 2 256*4882a593Smuzhiyun 257*4882a593Smuzhiyuninit_dbsc3_ctrl_533: 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun write32 DBKIND_A, DBKIND_D 260*4882a593Smuzhiyun write32 DBCONF_A, DBCONF_D 261*4882a593Smuzhiyun 262*4882a593Smuzhiyun write32 DBTR0_A, DBTR0_D_533 263*4882a593Smuzhiyun write32 DBTR1_A, DBTR1_D_533 264*4882a593Smuzhiyun write32 DBTR2_A, DBTR2_D 265*4882a593Smuzhiyun write32 DBTR3_A, DBTR3_D_533 266*4882a593Smuzhiyun write32 DBTR4_A, DBTR4_D_533 267*4882a593Smuzhiyun write32 DBTR5_A, DBTR5_D_533 268*4882a593Smuzhiyun write32 DBTR6_A, DBTR6_D_533 269*4882a593Smuzhiyun write32 DBTR7_A, DBTR7_D 270*4882a593Smuzhiyun write32 DBTR8_A, DBTR8_D_533 271*4882a593Smuzhiyun write32 DBTR9_A, DBTR9_D 272*4882a593Smuzhiyun write32 DBTR10_A, DBTR10_D_533 273*4882a593Smuzhiyun write32 DBTR11_A, DBTR11_D 274*4882a593Smuzhiyun write32 DBTR12_A, DBTR12_D_533 275*4882a593Smuzhiyun write32 DBTR13_A, DBTR13_D_533 276*4882a593Smuzhiyun write32 DBTR14_A, DBTR14_D 277*4882a593Smuzhiyun write32 DBTR15_A, DBTR15_D 278*4882a593Smuzhiyun write32 DBTR16_A, DBTR16_D_533 279*4882a593Smuzhiyun write32 DBTR17_A, DBTR17_D_533 280*4882a593Smuzhiyun write32 DBTR18_A, DBTR18_D_533 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun write32 DBBL_A, DBBL_D 283*4882a593Smuzhiyun write32 DBRNK0_A, DBRNK0_D 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D0_533 286*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D1 287*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D2 288*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D3 289*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D4 290*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D5_533 291*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D6 292*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D7 293*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D8 294*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D9_533 295*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D10 296*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D11 297*4882a593Smuzhiyun write32 DBCMD_A, DBCMD_D12 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun write32 DBBS0CNT1_A, DBBS0CNT1_D 300*4882a593Smuzhiyun write32 DBPDNCNF_A, DBPDNCNF_D 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun write32 DBRFCNF0_A, DBRFCNF0_D 303*4882a593Smuzhiyun write32 DBRFCNF1_A, DBRFCNF1_D_533 304*4882a593Smuzhiyun write32 DBRFCNF2_A, DBRFCNF2_D 305*4882a593Smuzhiyun write32 DBRFEN_A, DBRFEN_D 306*4882a593Smuzhiyun write32 DBACEN_A, DBACEN_D 307*4882a593Smuzhiyun write32 DBACEN_A, DBACEN_D 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun /* Dummy read */ 310*4882a593Smuzhiyun mov.l DBWAIT_A, r1 311*4882a593Smuzhiyun synco 312*4882a593Smuzhiyun mov.l @r1, r0 313*4882a593Smuzhiyun synco 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun /* Dummy read */ 316*4882a593Smuzhiyun mov.l SDRAM_A, r1 317*4882a593Smuzhiyun synco 318*4882a593Smuzhiyun mov.l @r1, r0 319*4882a593Smuzhiyun synco 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun /* need sleep 186A0 */ 322*4882a593Smuzhiyun 323*4882a593Smuzhiyun bra init_pfc_sh7734 324*4882a593Smuzhiyun nop 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun .align 2 327*4882a593Smuzhiyun 328*4882a593SmuzhiyunDBKIND_A: .long 0xFE800020 329*4882a593SmuzhiyunDBKIND_D: .long 0x00000005 330*4882a593SmuzhiyunDBCONF_A: .long 0xFE800024 331*4882a593SmuzhiyunDBCONF_D: .long 0x0D030A01 332*4882a593Smuzhiyun 333*4882a593SmuzhiyunDBTR0_A: .long 0xFE800040 334*4882a593SmuzhiyunDBTR0_D_533:.long 0x00000004 335*4882a593SmuzhiyunDBTR0_D_400:.long 0x00000003 336*4882a593SmuzhiyunDBTR1_A: .long 0xFE800044 337*4882a593SmuzhiyunDBTR1_D_533:.long 0x00000003 338*4882a593SmuzhiyunDBTR1_D_400:.long 0x00000002 339*4882a593SmuzhiyunDBTR2_A: .long 0xFE800048 340*4882a593SmuzhiyunDBTR2_D: .long 0x00000000 341*4882a593SmuzhiyunDBTR3_A: .long 0xFE800050 342*4882a593SmuzhiyunDBTR3_D_533:.long 0x00000004 343*4882a593SmuzhiyunDBTR3_D_400:.long 0x00000003 344*4882a593Smuzhiyun 345*4882a593SmuzhiyunDBTR4_A: .long 0xFE800054 346*4882a593SmuzhiyunDBTR4_D_533:.long 0x00050004 347*4882a593SmuzhiyunDBTR4_D_400:.long 0x00050003 348*4882a593Smuzhiyun 349*4882a593SmuzhiyunDBTR5_A: .long 0xFE800058 350*4882a593SmuzhiyunDBTR5_D_533:.long 0x0000000F 351*4882a593SmuzhiyunDBTR5_D_400:.long 0x0000000B 352*4882a593Smuzhiyun 353*4882a593SmuzhiyunDBTR6_A: .long 0xFE80005C 354*4882a593SmuzhiyunDBTR6_D_533:.long 0x0000000B 355*4882a593SmuzhiyunDBTR6_D_400:.long 0x00000008 356*4882a593Smuzhiyun 357*4882a593SmuzhiyunDBTR7_A: .long 0xFE800060 358*4882a593SmuzhiyunDBTR7_D: .long 0x00000002 /* common value */ 359*4882a593Smuzhiyun 360*4882a593SmuzhiyunDBTR8_A: .long 0xFE800064 361*4882a593SmuzhiyunDBTR8_D_533:.long 0x0000000D 362*4882a593SmuzhiyunDBTR8_D_400:.long 0x0000000A 363*4882a593Smuzhiyun 364*4882a593SmuzhiyunDBTR9_A: .long 0xFE800068 365*4882a593SmuzhiyunDBTR9_D: .long 0x00000002 /* common value */ 366*4882a593Smuzhiyun 367*4882a593SmuzhiyunDBTR10_A: .long 0xFE80006C 368*4882a593SmuzhiyunDBTR10_D_533:.long 0x00000004 369*4882a593SmuzhiyunDBTR10_D_400:.long 0x00000003 370*4882a593Smuzhiyun 371*4882a593SmuzhiyunDBTR11_A: .long 0xFE800070 372*4882a593SmuzhiyunDBTR11_D: .long 0x00000008 /* common value */ 373*4882a593Smuzhiyun 374*4882a593SmuzhiyunDBTR12_A: .long 0xFE800074 375*4882a593SmuzhiyunDBTR12_D_533:.long 0x00000009 376*4882a593SmuzhiyunDBTR12_D_400:.long 0x00000008 377*4882a593Smuzhiyun 378*4882a593SmuzhiyunDBTR13_A: .long 0xFE800078 379*4882a593SmuzhiyunDBTR13_D_533:.long 0x00000022 380*4882a593SmuzhiyunDBTR13_D_400:.long 0x0000001A 381*4882a593Smuzhiyun 382*4882a593SmuzhiyunDBTR14_A: .long 0xFE80007C 383*4882a593SmuzhiyunDBTR14_D: .long 0x00070002 /* common value */ 384*4882a593Smuzhiyun 385*4882a593SmuzhiyunDBTR15_A: .long 0xFE800080 386*4882a593SmuzhiyunDBTR15_D: .long 0x00000003 /* common value */ 387*4882a593Smuzhiyun 388*4882a593SmuzhiyunDBTR16_A: .long 0xFE800084 389*4882a593SmuzhiyunDBTR16_D_533:.long 0x120A1001 390*4882a593SmuzhiyunDBTR16_D_400:.long 0x12091001 391*4882a593Smuzhiyun 392*4882a593SmuzhiyunDBTR17_A: .long 0xFE800088 393*4882a593SmuzhiyunDBTR17_D_533:.long 0x00040000 394*4882a593SmuzhiyunDBTR17_D_400:.long 0x00030000 395*4882a593Smuzhiyun 396*4882a593SmuzhiyunDBTR18_A: .long 0xFE80008C 397*4882a593SmuzhiyunDBTR18_D_533:.long 0x02010200 398*4882a593SmuzhiyunDBTR18_D_400:.long 0x02000207 399*4882a593Smuzhiyun 400*4882a593SmuzhiyunDBBL_A: .long 0xFE8000B0 401*4882a593SmuzhiyunDBBL_D: .long 0x00000000 402*4882a593Smuzhiyun 403*4882a593SmuzhiyunDBRNK0_A: .long 0xFE800100 404*4882a593SmuzhiyunDBRNK0_D: .long 0x00000001 405*4882a593Smuzhiyun 406*4882a593SmuzhiyunDBCMD_A: .long 0xFE800018 407*4882a593SmuzhiyunDBCMD_D0_533: .long 0x1100006B 408*4882a593SmuzhiyunDBCMD_D0_400: .long 0x11000050 409*4882a593SmuzhiyunDBCMD_D1: .long 0x0B000000 /* common value */ 410*4882a593SmuzhiyunDBCMD_D2: .long 0x2A004000 /* common value */ 411*4882a593SmuzhiyunDBCMD_D3: .long 0x2B006000 /* common value */ 412*4882a593SmuzhiyunDBCMD_D4: .long 0x29002004 /* common value */ 413*4882a593SmuzhiyunDBCMD_D5_533: .long 0x28000743 414*4882a593SmuzhiyunDBCMD_D5_400: .long 0x28000533 415*4882a593SmuzhiyunDBCMD_D6: .long 0x0B000000 /* common value */ 416*4882a593SmuzhiyunDBCMD_D7: .long 0x0C000000 /* common value */ 417*4882a593SmuzhiyunDBCMD_D8: .long 0x0C000000 /* common value */ 418*4882a593SmuzhiyunDBCMD_D9_533: .long 0x28000643 419*4882a593SmuzhiyunDBCMD_D9_400: .long 0x28000433 420*4882a593SmuzhiyunDBCMD_D10: .long 0x000000C8 /* common value */ 421*4882a593SmuzhiyunDBCMD_D11: .long 0x29002384 /* common value */ 422*4882a593SmuzhiyunDBCMD_D12: .long 0x29002004 /* common value */ 423*4882a593Smuzhiyun 424*4882a593SmuzhiyunDBBS0CNT1_A: .long 0xFE800304 425*4882a593SmuzhiyunDBBS0CNT1_D: .long 0x00000000 426*4882a593SmuzhiyunDBPDNCNF_A: .long 0xFE800180 427*4882a593SmuzhiyunDBPDNCNF_D: .long 0x00000200 428*4882a593Smuzhiyun 429*4882a593SmuzhiyunDBRFCNF0_A: .long 0xFE8000E0 430*4882a593SmuzhiyunDBRFCNF0_D: .long 0x000001FF 431*4882a593SmuzhiyunDBRFCNF1_A: .long 0xFE8000E4 432*4882a593SmuzhiyunDBRFCNF1_D_533: .long 0x00000805 433*4882a593SmuzhiyunDBRFCNF1_D_400: .long 0x00000618 434*4882a593Smuzhiyun 435*4882a593SmuzhiyunDBRFCNF2_A: .long 0xFE8000E8 436*4882a593SmuzhiyunDBRFCNF2_D: .long 0x00000000 437*4882a593Smuzhiyun 438*4882a593SmuzhiyunDBRFEN_A: .long 0xFE800014 439*4882a593SmuzhiyunDBRFEN_D: .long 0x00000001 440*4882a593Smuzhiyun 441*4882a593SmuzhiyunDBACEN_A: .long 0xFE800010 442*4882a593SmuzhiyunDBACEN_D: .long 0x00000001 443*4882a593Smuzhiyun 444*4882a593SmuzhiyunDBWAIT_A: .long 0xFE80001C 445*4882a593SmuzhiyunSDRAM_A: .long 0x0C000000 446*4882a593Smuzhiyun 447*4882a593Smuzhiyuninit_pfc_sh7734: 448*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_MODESEL1 449*4882a593Smuzhiyun write32 PFC_MODESEL1_A, PFC_MODESEL1_D 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_MODESEL2 452*4882a593Smuzhiyun write32 PFC_MODESEL2_A, PFC_MODESEL2_D 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_IPSR3 455*4882a593Smuzhiyun write32 PFC_IPSR3_A, PFC_IPSR3_D 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_IPSR4 458*4882a593Smuzhiyun write32 PFC_IPSR4_A, PFC_IPSR4_D 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_IPSR11 461*4882a593Smuzhiyun write32 PFC_IPSR11_A, PFC_IPSR11_D 462*4882a593Smuzhiyun 463*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_GPSR0 464*4882a593Smuzhiyun write32 PFC_GPSR0_A, PFC_GPSR0_D 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_GPSR1 467*4882a593Smuzhiyun write32 PFC_GPSR1_A, PFC_GPSR1_D 468*4882a593Smuzhiyun 469*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_GPSR2 470*4882a593Smuzhiyun write32 PFC_GPSR2_A, PFC_GPSR2_D 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_GPSR3 473*4882a593Smuzhiyun write32 PFC_GPSR3_A, PFC_GPSR3_D 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_GPSR4 476*4882a593Smuzhiyun write32 PFC_GPSR4_A, PFC_GPSR4_D 477*4882a593Smuzhiyun 478*4882a593Smuzhiyun write32 PFC_PMMR_A, PFC_PMMR_GPSR5 479*4882a593Smuzhiyun write32 PFC_GPSR5_A, PFC_GPSR5_D 480*4882a593Smuzhiyun 481*4882a593Smuzhiyun /* sleep 186A0 */ 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun write32 GPIO2_INOUTSEL1_A, GPIO2_INOUTSEL1_D 484*4882a593Smuzhiyun write32 GPIO1_OUTDT1_A, GPIO1_OUTDT1_D 485*4882a593Smuzhiyun write32 GPIO2_INOUTSEL2_A, GPIO2_INOUTSEL2_D 486*4882a593Smuzhiyun write32 GPIO2_OUTDT2_A, GPIO2_OUTDT2_D 487*4882a593Smuzhiyun write32 GPIO4_INOUTSEL4_A, GPIO4_INOUTSEL4_D 488*4882a593Smuzhiyun write32 GPIO4_OUTDT4_A, GPIO4_OUTDT4_D 489*4882a593Smuzhiyun 490*4882a593Smuzhiyun write32 CCR_A, CCR_D 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun stc sr, r0 493*4882a593Smuzhiyun mov.l SR_MASK_D, r1 494*4882a593Smuzhiyun and r1, r0 495*4882a593Smuzhiyun ldc r0, sr 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun rts 498*4882a593Smuzhiyun nop 499*4882a593Smuzhiyun 500*4882a593Smuzhiyun .align 2 501*4882a593Smuzhiyun 502*4882a593SmuzhiyunPFC_PMMR_A: .long 0xFFFC0000 503*4882a593Smuzhiyun 504*4882a593Smuzhiyun/* MODESEL 505*4882a593Smuzhiyun * 28: Select IEBUS Group B 506*4882a593Smuzhiyun */ 507*4882a593SmuzhiyunPFC_MODESEL1_A: .long 0xFFFC004C 508*4882a593SmuzhiyunPFC_MODESEL1_D: .long 0x10000000 509*4882a593SmuzhiyunPFC_PMMR_MODESEL1: .long 0xEFFFFFFF 510*4882a593Smuzhiyun 511*4882a593Smuzhiyun/* MODESEL 512*4882a593Smuzhiyun * 9: Select SCIF3 Group B 513*4882a593Smuzhiyun * 7: Select SCIF2 Group B 514*4882a593Smuzhiyun * 4: Select SCIF1 Group B 515*4882a593Smuzhiyun */ 516*4882a593SmuzhiyunPFC_MODESEL2_A: .long 0xFFFC0050 517*4882a593SmuzhiyunPFC_MODESEL2_D: .long 0x00000290 518*4882a593SmuzhiyunPFC_PMMR_MODESEL2: .long 0xFFFFFD6F 519*4882a593Smuzhiyun 520*4882a593Smuzhiyun# Enable functios 521*4882a593Smuzhiyun# SD1_DAT2_A SD1_DAT1_A, SD1_DAT0_A, 522*4882a593Smuzhiyun# EXWAIT0, RDW/RW, SD1_CMD_A, SD1_WP_A, 523*4882a593Smuzhiyun# SD1_CD_A, TX3_B, RX3_B, CS1, D15 524*4882a593SmuzhiyunPFC_IPSR3_A: .long 0xFFFC0028 525*4882a593SmuzhiyunPFC_IPSR3_D: .long 0x09209248 526*4882a593SmuzhiyunPFC_PMMR_IPSR3: .long 0xF6DF6DB7 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun# Enable functios 529*4882a593Smuzhiyun# RMII0_MDIO_A , RMII0_MDC_A, 530*4882a593Smuzhiyun# RMII0_CRS_DV_A, RMII0_RX_ER_A, 531*4882a593Smuzhiyun# RMII0_TXD_EN_A, MII0_RXD1_A 532*4882a593SmuzhiyunPFC_IPSR4_A: .long 0xFFFC002C 533*4882a593SmuzhiyunPFC_IPSR4_D: .long 0x0001B6DB 534*4882a593SmuzhiyunPFC_PMMR_IPSR4: .long 0xFFFE4924 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun# Enable functios 537*4882a593Smuzhiyun# DACK1, DREQ1, SD1_DAT3_A, SD1_CLK_A, IERX_B, 538*4882a593Smuzhiyun# IETX_B, TX0_A, RMII0_TXD0_A, 539*4882a593Smuzhiyun# RMII0_TXD1_A, RMII0_TXD0_A, SDSEL, SDA0, SDA1, SCL1 540*4882a593SmuzhiyunPFC_IPSR11_A: .long 0xFFFC0048 541*4882a593SmuzhiyunPFC_IPSR11_D: .long 0x002C89B0 542*4882a593SmuzhiyunPFC_PMMR_IPSR11:.long 0xFFD3764F 543*4882a593Smuzhiyun 544*4882a593SmuzhiyunPFC_GPSR0_A: .long 0xFFFC0004 545*4882a593SmuzhiyunPFC_GPSR0_D: .long 0xFFFFFFFF 546*4882a593SmuzhiyunPFC_PMMR_GPSR0: .long 0x00000000 547*4882a593Smuzhiyun 548*4882a593SmuzhiyunPFC_GPSR1_A: .long 0xFFFC0008 549*4882a593SmuzhiyunPFC_GPSR1_D: .long 0x7FBF7FFF 550*4882a593SmuzhiyunPFC_PMMR_GPSR1: .long 0x80408000 551*4882a593Smuzhiyun 552*4882a593SmuzhiyunPFC_GPSR2_A: .long 0xFFFC000C 553*4882a593SmuzhiyunPFC_GPSR2_D: .long 0xBFC07EDF 554*4882a593SmuzhiyunPFC_PMMR_GPSR2: .long 0x403F8120 555*4882a593Smuzhiyun 556*4882a593SmuzhiyunPFC_GPSR3_A: .long 0xFFFC0010 557*4882a593SmuzhiyunPFC_GPSR3_D: .long 0xFFFFFFFF 558*4882a593SmuzhiyunPFC_PMMR_GPSR3: .long 0x00000000 559*4882a593Smuzhiyun 560*4882a593SmuzhiyunPFC_GPSR4_A: .long 0xFFFC0014 561*4882a593Smuzhiyun#if 0 /* orig */ 562*4882a593SmuzhiyunPFC_GPSR4_D: .long 0xFFFFFFFF 563*4882a593SmuzhiyunPFC_PMMR_GPSR4: .long 0x00000000 564*4882a593Smuzhiyun#else 565*4882a593SmuzhiyunPFC_GPSR4_D: .long 0xFBFFFFFF 566*4882a593SmuzhiyunPFC_PMMR_GPSR4: .long 0x04000000 567*4882a593Smuzhiyun#endif 568*4882a593Smuzhiyun 569*4882a593SmuzhiyunPFC_GPSR5_A: .long 0xFFFC0018 570*4882a593SmuzhiyunPFC_GPSR5_D: .long 0x00000C01 571*4882a593SmuzhiyunPFC_PMMR_GPSR5: .long 0xFFFFF3FE 572*4882a593Smuzhiyun 573*4882a593SmuzhiyunI2C_ICCR2_A: .long 0xFFC70001 574*4882a593SmuzhiyunI2C_ICCR2_D: .long 0x00 575*4882a593SmuzhiyunI2C_ICCR2_D1: .long 0x20 576*4882a593Smuzhiyun 577*4882a593SmuzhiyunGPIO2_INOUTSEL1_A: .long 0xFFC41004 578*4882a593SmuzhiyunGPIO2_INOUTSEL1_D: .long 0x80408000 579*4882a593SmuzhiyunGPIO1_OUTDT1_A: .long 0xFFC41008 /* bit15: LED4, bit22: LED5 */ 580*4882a593SmuzhiyunGPIO1_OUTDT1_D: .long 0x80408000 581*4882a593SmuzhiyunGPIO2_INOUTSEL2_A: .long 0xFFC42004 582*4882a593SmuzhiyunGPIO2_INOUTSEL2_D: .long 0x40000120 583*4882a593SmuzhiyunGPIO2_OUTDT2_A: .long 0xFFC42008 584*4882a593SmuzhiyunGPIO2_OUTDT2_D: .long 0x40000120 585*4882a593SmuzhiyunGPIO4_INOUTSEL4_A: .long 0xFFC44004 586*4882a593SmuzhiyunGPIO4_INOUTSEL4_D: .long 0x04000000 587*4882a593SmuzhiyunGPIO4_OUTDT4_A: .long 0xFFC44008 588*4882a593SmuzhiyunGPIO4_OUTDT4_D: .long 0x04000000 589*4882a593Smuzhiyun 590*4882a593SmuzhiyunCCR_A: .long 0xFF00001C 591*4882a593SmuzhiyunCCR_D: .long 0x0000090B 592*4882a593SmuzhiyunSR_MASK_D: .long 0xEFFFFF0F 593