1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2008 Renesas Solutions Corp. 3*4882a593Smuzhiyun * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * board/ap325rxa/lowlevel_init.S 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include <config.h> 11*4882a593Smuzhiyun#include <asm/processor.h> 12*4882a593Smuzhiyun#include <asm/macro.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun/* 15*4882a593Smuzhiyun * Board specific low level init code, called _very_ early in the 16*4882a593Smuzhiyun * startup sequence. Relocation to SDRAM has not happened yet, no 17*4882a593Smuzhiyun * stack is available, bss section has not been initialised, etc. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * (Note: As no stack is available, no subroutines can be called...). 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun .global lowlevel_init 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun .text 25*4882a593Smuzhiyun .align 2 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunlowlevel_init: 28*4882a593Smuzhiyun write16 DRVCRA_A, DRVCRA_D 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun write16 DRVCRB_A, DRVCRB_D 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun write16 RWTCSR_A, RWTCSR_D1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun write16 RWTCNT_A, RWTCNT_D 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun write16 RWTCSR_A, RWTCSR_D2 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun write32 FRQCR_A, FRQCR_D 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun write32 CMNCR_A, CMNCR_D 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun write32 CS0BCR_A, CS0BCR_D 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun write32 CS4BCR_A, CS4BCR_D 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun write32 CS5ABCR_A, CS5ABCR_D 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun write32 CS5BBCR_A, CS5BBCR_D 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun write32 CS6ABCR_A, CS6ABCR_D 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun write32 CS6BBCR_A, CS6BBCR_D 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun write32 CS0WCR_A, CS0WCR_D 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun write32 CS4WCR_A, CS4WCR_D 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun write32 CS5AWCR_A, CS5AWCR_D 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun write32 CS5BWCR_A, CS5BWCR_D 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun write32 CS6AWCR_A, CS6AWCR_D 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun write32 CS6BWCR_A, CS6BWCR_D 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun write32 SBSC_SDCR_A, SBSC_SDCR_D1 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun write32 SBSC_SDWCR_A, SBSC_SDWCR_D 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun write32 SBSC_SDPCR_A, SBSC_SDPCR_D 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun write32 SBSC_RTCSR_A, SBSC_RTCSR_D 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun write32 SBSC_RTCNT_A, SBSC_RTCNT_D 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun write32 SBSC_RTCOR_A, SBSC_RTCOR_D 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun write8 SBSC_SDMR3_A1, SBSC_SDMR3_D 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun write8 SBSC_SDMR3_A2, SBSC_SDMR3_D 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun mov.l SLEEP_CNT, r1 83*4882a593Smuzhiyun2: tst r1, r1 84*4882a593Smuzhiyun nop 85*4882a593Smuzhiyun bf/s 2b 86*4882a593Smuzhiyun dt r1 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun write8 SBSC_SDMR3_A3, SBSC_SDMR3_D 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun write32 SBSC_SDCR_A, SBSC_SDCR_D2 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun write32 CCR_A, CCR_D 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun ! BL bit off (init = ON) (?!?) 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun stc sr, r0 ! BL bit off(init=ON) 97*4882a593Smuzhiyun mov.l SR_MASK_D, r1 98*4882a593Smuzhiyun and r1, r0 99*4882a593Smuzhiyun ldc r0, sr 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun rts 102*4882a593Smuzhiyun mov #0, r0 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun .align 2 105*4882a593Smuzhiyun 106*4882a593SmuzhiyunDRVCRA_A: .long DRVCRA 107*4882a593SmuzhiyunDRVCRB_A: .long DRVCRB 108*4882a593SmuzhiyunDRVCRA_D: .word 0x4555 109*4882a593SmuzhiyunDRVCRB_D: .word 0x0005 110*4882a593Smuzhiyun 111*4882a593SmuzhiyunRWTCSR_A: .long RWTCSR 112*4882a593SmuzhiyunRWTCNT_A: .long RWTCNT 113*4882a593SmuzhiyunFRQCR_A: .long FRQCR 114*4882a593SmuzhiyunRWTCSR_D1: .word 0xa507 115*4882a593SmuzhiyunRWTCSR_D2: .word 0xa504 116*4882a593SmuzhiyunRWTCNT_D: .word 0x5a00 117*4882a593Smuzhiyun.align 2 118*4882a593SmuzhiyunFRQCR_D: .long 0x0b04474a 119*4882a593Smuzhiyun 120*4882a593SmuzhiyunSBSC_SDCR_A: .long SBSC_SDCR 121*4882a593SmuzhiyunSBSC_SDWCR_A: .long SBSC_SDWCR 122*4882a593SmuzhiyunSBSC_SDPCR_A: .long SBSC_SDPCR 123*4882a593SmuzhiyunSBSC_RTCSR_A: .long SBSC_RTCSR 124*4882a593SmuzhiyunSBSC_RTCNT_A: .long SBSC_RTCNT 125*4882a593SmuzhiyunSBSC_RTCOR_A: .long SBSC_RTCOR 126*4882a593SmuzhiyunSBSC_SDMR3_A1: .long 0xfe510000 127*4882a593SmuzhiyunSBSC_SDMR3_A2: .long 0xfe500242 128*4882a593SmuzhiyunSBSC_SDMR3_A3: .long 0xfe5c0042 129*4882a593Smuzhiyun 130*4882a593SmuzhiyunSBSC_SDCR_D1: .long 0x92810112 131*4882a593SmuzhiyunSBSC_SDCR_D2: .long 0x92810912 132*4882a593SmuzhiyunSBSC_SDWCR_D: .long 0x05162482 133*4882a593SmuzhiyunSBSC_SDPCR_D: .long 0x00300087 134*4882a593SmuzhiyunSBSC_RTCSR_D: .long 0xa55a0212 135*4882a593SmuzhiyunSBSC_RTCNT_D: .long 0xa55a0000 136*4882a593SmuzhiyunSBSC_RTCOR_D: .long 0xa55a0040 137*4882a593SmuzhiyunSBSC_SDMR3_D: .long 0x00 138*4882a593Smuzhiyun 139*4882a593SmuzhiyunCMNCR_A: .long CMNCR 140*4882a593SmuzhiyunCS0BCR_A: .long CS0BCR 141*4882a593SmuzhiyunCS4BCR_A: .long CS4BCR 142*4882a593SmuzhiyunCS5ABCR_A: .long CS5ABCR 143*4882a593SmuzhiyunCS5BBCR_A: .long CS5BBCR 144*4882a593SmuzhiyunCS6ABCR_A: .long CS6ABCR 145*4882a593SmuzhiyunCS6BBCR_A: .long CS6BBCR 146*4882a593SmuzhiyunCS0WCR_A: .long CS0WCR 147*4882a593SmuzhiyunCS4WCR_A: .long CS4WCR 148*4882a593SmuzhiyunCS5AWCR_A: .long CS5AWCR 149*4882a593SmuzhiyunCS5BWCR_A: .long CS5BWCR 150*4882a593SmuzhiyunCS6AWCR_A: .long CS6AWCR 151*4882a593SmuzhiyunCS6BWCR_A: .long CS6BWCR 152*4882a593Smuzhiyun 153*4882a593SmuzhiyunCMNCR_D: .long 0x00000013 154*4882a593SmuzhiyunCS0BCR_D: .long 0x24920400 155*4882a593SmuzhiyunCS4BCR_D: .long 0x24920400 156*4882a593SmuzhiyunCS5ABCR_D: .long 0x24920400 157*4882a593SmuzhiyunCS5BBCR_D: .long 0x7fff0600 158*4882a593SmuzhiyunCS6ABCR_D: .long 0x24920400 159*4882a593SmuzhiyunCS6BBCR_D: .long 0x24920600 160*4882a593SmuzhiyunCS0WCR_D: .long 0x00000480 161*4882a593SmuzhiyunCS4WCR_D: .long 0x00000480 162*4882a593SmuzhiyunCS5AWCR_D: .long 0x00000380 163*4882a593SmuzhiyunCS5BWCR_D: .long 0x00000080 164*4882a593SmuzhiyunCS6AWCR_D: .long 0x00000300 165*4882a593SmuzhiyunCS6BWCR_D: .long 0x00000540 166*4882a593Smuzhiyun 167*4882a593SmuzhiyunCCR_A: .long 0xff00001c 168*4882a593SmuzhiyunCCR_D: .long 0x0000090d 169*4882a593Smuzhiyun 170*4882a593SmuzhiyunSLEEP_CNT: .long 0x00000800 171*4882a593SmuzhiyunSR_MASK_D: .long 0xEFFFFF0F 172