1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2008
3*4882a593Smuzhiyun * Grazvydas Ignotas <notasas@gmail.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
6*4882a593Smuzhiyun * Richard Woodruff <r-woodruff2@ti.com>
7*4882a593Smuzhiyun * Syed Mohammed Khasim <khasim@ti.com>
8*4882a593Smuzhiyun * Sunil Kumar <sunilsaini05@gmail.com>
9*4882a593Smuzhiyun * Shashi Ranjan <shashiranjanmca05@gmail.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * (C) Copyright 2004-2008
12*4882a593Smuzhiyun * Texas Instruments, <www.ti.com>
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun #include <common.h>
17*4882a593Smuzhiyun #include <twl4030.h>
18*4882a593Smuzhiyun #include <asm/io.h>
19*4882a593Smuzhiyun #include <asm/gpio.h>
20*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
21*4882a593Smuzhiyun #include <asm/arch/mux.h>
22*4882a593Smuzhiyun #include <asm/arch/gpio.h>
23*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
24*4882a593Smuzhiyun #include <asm/mach-types.h>
25*4882a593Smuzhiyun #include "pandora.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define TWL4030_BB_CFG_BBCHEN (1 << 4)
30*4882a593Smuzhiyun #define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
31*4882a593Smuzhiyun #define TWL4030_BB_CFG_BBISEL_500UA 2
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define CONTROL_WKUP_CTRL 0x48002a5c
34*4882a593Smuzhiyun #define GPIO_IO_PWRDNZ (1 << 6)
35*4882a593Smuzhiyun #define PBIASLITEVMODE1 (1 << 8)
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun * Routine: board_init
39*4882a593Smuzhiyun * Description: Early hardware init.
40*4882a593Smuzhiyun */
board_init(void)41*4882a593Smuzhiyun int board_init(void)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
44*4882a593Smuzhiyun /* board id for Linux */
45*4882a593Smuzhiyun gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
46*4882a593Smuzhiyun /* boot param addr */
47*4882a593Smuzhiyun gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun return 0;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
set_output_gpio(unsigned int gpio,int value)52*4882a593Smuzhiyun static void set_output_gpio(unsigned int gpio, int value)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun int ret;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun ret = gpio_request(gpio, "");
57*4882a593Smuzhiyun if (ret != 0) {
58*4882a593Smuzhiyun printf("could not request GPIO %u\n", gpio);
59*4882a593Smuzhiyun return;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun ret = gpio_direction_output(gpio, value);
62*4882a593Smuzhiyun if (ret != 0)
63*4882a593Smuzhiyun printf("could not set GPIO %u to %d\n", gpio, value);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /*
67*4882a593Smuzhiyun * Routine: misc_init_r
68*4882a593Smuzhiyun * Description: Configure board specific parts
69*4882a593Smuzhiyun */
misc_init_r(void)70*4882a593Smuzhiyun int misc_init_r(void)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun t2_t *t2_base = (t2_t *)T2_BASE;
73*4882a593Smuzhiyun u32 pbias_lite;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* set up dual-voltage GPIOs to 1.8V */
78*4882a593Smuzhiyun pbias_lite = readl(&t2_base->pbias_lite);
79*4882a593Smuzhiyun pbias_lite &= ~PBIASLITEVMODE1;
80*4882a593Smuzhiyun pbias_lite |= PBIASLITEPWRDNZ1;
81*4882a593Smuzhiyun writel(pbias_lite, &t2_base->pbias_lite);
82*4882a593Smuzhiyun if (get_cpu_family() == CPU_OMAP36XX)
83*4882a593Smuzhiyun writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
84*4882a593Smuzhiyun CONTROL_WKUP_CTRL);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* make sure audio and BT chips are in powerdown state */
87*4882a593Smuzhiyun set_output_gpio(14, 0);
88*4882a593Smuzhiyun set_output_gpio(15, 0);
89*4882a593Smuzhiyun set_output_gpio(118, 0);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* enable USB supply */
92*4882a593Smuzhiyun set_output_gpio(164, 1);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* wifi needs a short pulse to enter powersave state */
95*4882a593Smuzhiyun set_output_gpio(23, 1);
96*4882a593Smuzhiyun udelay(5000);
97*4882a593Smuzhiyun gpio_direction_output(23, 0);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
100*4882a593Smuzhiyun twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
101*4882a593Smuzhiyun TWL4030_PM_RECEIVER_BB_CFG,
102*4882a593Smuzhiyun TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
103*4882a593Smuzhiyun TWL4030_BB_CFG_BBISEL_500UA);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun omap_die_id_display();
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun * Routine: set_muxconf_regs
112*4882a593Smuzhiyun * Description: Setting up the configuration Mux registers specific to the
113*4882a593Smuzhiyun * hardware. Many pins need to be moved from protect to primary
114*4882a593Smuzhiyun * mode.
115*4882a593Smuzhiyun */
set_muxconf_regs(void)116*4882a593Smuzhiyun void set_muxconf_regs(void)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun MUX_PANDORA();
119*4882a593Smuzhiyun if (get_cpu_family() == CPU_OMAP36XX) {
120*4882a593Smuzhiyun MUX_PANDORA_3730();
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun #ifdef CONFIG_MMC
board_mmc_init(bd_t * bis)125*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun return omap_mmc_init(0, 0, 0, -1, -1);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
board_mmc_power_init(void)130*4882a593Smuzhiyun void board_mmc_power_init(void)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun twl4030_power_mmc_init(0);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun #endif
135