xref: /OK3568_Linux_fs/u-boot/board/omicron/calimain/calimain.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2011 OMICRON electronics GmbH
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Based on da850evm.c. Original Copyrights follow:
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7*4882a593Smuzhiyun  * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
8*4882a593Smuzhiyun  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <i2c.h>
15*4882a593Smuzhiyun #include <net.h>
16*4882a593Smuzhiyun #include <netdev.h>
17*4882a593Smuzhiyun #include <watchdog.h>
18*4882a593Smuzhiyun #include <asm/io.h>
19*4882a593Smuzhiyun #include <asm/arch/hardware.h>
20*4882a593Smuzhiyun #include <asm/arch/gpio.h>
21*4882a593Smuzhiyun #include <asm/ti-common/davinci_nand.h>
22*4882a593Smuzhiyun #include <asm/arch/emac_defs.h>
23*4882a593Smuzhiyun #include <asm/arch/pinmux_defs.h>
24*4882a593Smuzhiyun #include <asm/arch/davinci_misc.h>
25*4882a593Smuzhiyun #include <asm/arch/timer_defs.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define CALIMAIN_HWVERSION_MASK    0x7f000000
30*4882a593Smuzhiyun #define CALIMAIN_HWVERSION_SHIFT   24
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* Hardware version pinmux settings */
33*4882a593Smuzhiyun const struct pinmux_config hwversion_pins[] = {
34*4882a593Smuzhiyun 	{ pinmux(16), 8, 2 }, /* GP7[15] */
35*4882a593Smuzhiyun 	{ pinmux(16), 8, 3 }, /* GP7[14] */
36*4882a593Smuzhiyun 	{ pinmux(16), 8, 4 }, /* GP7[13] */
37*4882a593Smuzhiyun 	{ pinmux(16), 8, 5 }, /* GP7[12] */
38*4882a593Smuzhiyun 	{ pinmux(16), 8, 6 }, /* GP7[11] */
39*4882a593Smuzhiyun 	{ pinmux(16), 8, 7 }, /* GP7[10] */
40*4882a593Smuzhiyun 	{ pinmux(17), 8, 0 }, /* GP7[9] */
41*4882a593Smuzhiyun 	{ pinmux(17), 8, 1 }  /* GP7[8] */
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun const struct pinmux_resource pinmuxes[] = {
45*4882a593Smuzhiyun 	PINMUX_ITEM(uart2_pins_txrx),
46*4882a593Smuzhiyun 	PINMUX_ITEM(emac_pins_mii),
47*4882a593Smuzhiyun 	PINMUX_ITEM(emac_pins_mdio),
48*4882a593Smuzhiyun 	PINMUX_ITEM(emifa_pins_nor),
49*4882a593Smuzhiyun 	PINMUX_ITEM(emifa_pins_cs2),
50*4882a593Smuzhiyun 	PINMUX_ITEM(emifa_pins_cs3),
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun const struct lpsc_resource lpsc[] = {
56*4882a593Smuzhiyun 	{ DAVINCI_LPSC_AEMIF },	/* NAND, NOR */
57*4882a593Smuzhiyun 	{ DAVINCI_LPSC_EMAC },	/* image download */
58*4882a593Smuzhiyun 	{ DAVINCI_LPSC_UART2 },	/* console */
59*4882a593Smuzhiyun 	{ DAVINCI_LPSC_GPIO },
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun const int lpsc_size = ARRAY_SIZE(lpsc);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* read board revision from GPIO7[8..14] */
get_board_rev(void)65*4882a593Smuzhiyun u32 get_board_rev(void)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	lpsc_on(DAVINCI_LPSC_GPIO);
68*4882a593Smuzhiyun 	if (davinci_configure_pin_mux(hwversion_pins,
69*4882a593Smuzhiyun 				      ARRAY_SIZE(hwversion_pins)) != 0)
70*4882a593Smuzhiyun 		return 0xffffffff;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	return (davinci_gpio_bank67->in_data & CALIMAIN_HWVERSION_MASK)
73*4882a593Smuzhiyun 		>> CALIMAIN_HWVERSION_SHIFT;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /*
77*4882a593Smuzhiyun  * determine the oscillator frequency depending on the board revision
78*4882a593Smuzhiyun  *
79*4882a593Smuzhiyun  * rev 0x00  ... 25 MHz oscillator
80*4882a593Smuzhiyun  * rev 0x01  ... 24 MHz oscillator
81*4882a593Smuzhiyun  */
calimain_get_osc_freq(void)82*4882a593Smuzhiyun int calimain_get_osc_freq(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	u32 rev;
85*4882a593Smuzhiyun 	int freq;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	rev = get_board_rev();
88*4882a593Smuzhiyun 	switch (rev) {
89*4882a593Smuzhiyun 	case 0x00:
90*4882a593Smuzhiyun 		freq = 25000000;
91*4882a593Smuzhiyun 		break;
92*4882a593Smuzhiyun 	default:
93*4882a593Smuzhiyun 		freq = 24000000;
94*4882a593Smuzhiyun 		break;
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 	return freq;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
board_init(void)99*4882a593Smuzhiyun int board_init(void)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	int val;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	irq_init();
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	/* address of boot parameters */
106*4882a593Smuzhiyun 	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #ifdef CONFIG_DRIVER_TI_EMAC
109*4882a593Smuzhiyun 	/* select emac MII mode */
110*4882a593Smuzhiyun 	val = readl(&davinci_syscfg_regs->cfgchip3);
111*4882a593Smuzhiyun 	val &= ~(1 << 8);
112*4882a593Smuzhiyun 	writel(val, &davinci_syscfg_regs->cfgchip3);
113*4882a593Smuzhiyun #endif /* CONFIG_DRIVER_TI_EMAC */
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun #ifdef CONFIG_HW_WATCHDOG
116*4882a593Smuzhiyun 	davinci_hw_watchdog_enable();
117*4882a593Smuzhiyun #endif
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	printf("Input clock frequency: %d Hz\n", calimain_get_osc_freq());
120*4882a593Smuzhiyun 	printf("Board revision:        %d\n", get_board_rev());
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun #ifdef CONFIG_DRIVER_TI_EMAC
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun  * Initializes on-board ethernet controllers.
128*4882a593Smuzhiyun  */
board_eth_init(bd_t * bis)129*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	if (!davinci_emac_initialize()) {
132*4882a593Smuzhiyun 		printf("Error: Ethernet init failed!\n");
133*4882a593Smuzhiyun 		return -1;
134*4882a593Smuzhiyun 	}
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun #endif /* CONFIG_DRIVER_TI_EMAC */
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun #ifdef CONFIG_HW_WATCHDOG
hw_watchdog_reset(void)141*4882a593Smuzhiyun void hw_watchdog_reset(void)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	davinci_hw_watchdog_reset();
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun #endif
146