1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Olimex MX23 Olinuxino board 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013 Marek Vasut <marex@denx.de> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <common.h> 10*4882a593Smuzhiyun #include <asm/gpio.h> 11*4882a593Smuzhiyun #include <asm/io.h> 12*4882a593Smuzhiyun #include <asm/arch/iomux-mx23.h> 13*4882a593Smuzhiyun #include <asm/arch/imx-regs.h> 14*4882a593Smuzhiyun #include <asm/arch/clock.h> 15*4882a593Smuzhiyun #include <asm/arch/sys_proto.h> 16*4882a593Smuzhiyun #ifdef CONFIG_LED_STATUS 17*4882a593Smuzhiyun #include <status_led.h> 18*4882a593Smuzhiyun #endif 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* 23*4882a593Smuzhiyun * Functions 24*4882a593Smuzhiyun */ board_early_init_f(void)25*4882a593Smuzhiyunint board_early_init_f(void) 26*4882a593Smuzhiyun { 27*4882a593Smuzhiyun /* IO0 clock at 480MHz */ 28*4882a593Smuzhiyun mxs_set_ioclk(MXC_IOCLK0, 480000); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* SSP0 clock at 96MHz */ 31*4882a593Smuzhiyun mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun return 0; 34*4882a593Smuzhiyun } 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun #ifdef CONFIG_CMD_USB board_ehci_hcd_init(int port)37*4882a593Smuzhiyunint board_ehci_hcd_init(int port) 38*4882a593Smuzhiyun { 39*4882a593Smuzhiyun /* Enable LAN9512 (Maxi) or GL850G (Mini) USB HUB power. */ 40*4882a593Smuzhiyun gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 1); 41*4882a593Smuzhiyun udelay(100); 42*4882a593Smuzhiyun return 0; 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun board_ehci_hcd_exit(int port)45*4882a593Smuzhiyunint board_ehci_hcd_exit(int port) 46*4882a593Smuzhiyun { 47*4882a593Smuzhiyun /* Enable LAN9512 (Maxi) or GL850G (Mini) USB HUB power. */ 48*4882a593Smuzhiyun gpio_direction_output(MX23_PAD_GPMI_ALE__GPIO_0_17, 0); 49*4882a593Smuzhiyun return 0; 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun dram_init(void)53*4882a593Smuzhiyunint dram_init(void) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun return mxs_dram_init(); 56*4882a593Smuzhiyun } 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #ifdef CONFIG_CMD_MMC mx23_olx_mmc_cd(int id)59*4882a593Smuzhiyunstatic int mx23_olx_mmc_cd(int id) 60*4882a593Smuzhiyun { 61*4882a593Smuzhiyun return 1; /* Card always present */ 62*4882a593Smuzhiyun } 63*4882a593Smuzhiyun board_mmc_init(bd_t * bis)64*4882a593Smuzhiyunint board_mmc_init(bd_t *bis) 65*4882a593Smuzhiyun { 66*4882a593Smuzhiyun return mxsmmc_initialize(bis, 0, NULL, mx23_olx_mmc_cd); 67*4882a593Smuzhiyun } 68*4882a593Smuzhiyun #endif 69*4882a593Smuzhiyun board_init(void)70*4882a593Smuzhiyunint board_init(void) 71*4882a593Smuzhiyun { 72*4882a593Smuzhiyun /* Adress of boot parameters */ 73*4882a593Smuzhiyun gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE) 76*4882a593Smuzhiyun status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_STATE); 77*4882a593Smuzhiyun #endif 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun return 0; 80*4882a593Smuzhiyun } 81