1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <asm/arch/pinmux.h>
10*4882a593Smuzhiyun #include <asm/arch/gp_padctrl.h>
11*4882a593Smuzhiyun #include "pinmux-config-dalmore.h"
12*4882a593Smuzhiyun #include <i2c.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define BAT_I2C_ADDRESS 0x48 /* TPS65090 charger */
15*4882a593Smuzhiyun #define PMU_I2C_ADDRESS 0x58 /* TPS65913 PMU */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun * Routine: pinmux_init
19*4882a593Smuzhiyun * Description: Do individual peripheral pinmux configs
20*4882a593Smuzhiyun */
pinmux_init(void)21*4882a593Smuzhiyun void pinmux_init(void)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun pinmux_config_pingrp_table(tegra114_pinmux_set_nontristate,
24*4882a593Smuzhiyun ARRAY_SIZE(tegra114_pinmux_set_nontristate));
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun pinmux_config_pingrp_table(tegra114_pinmux_common,
27*4882a593Smuzhiyun ARRAY_SIZE(tegra114_pinmux_common));
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun pinmux_config_pingrp_table(unused_pins_lowpower,
30*4882a593Smuzhiyun ARRAY_SIZE(unused_pins_lowpower));
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* Initialize any non-default pad configs (APB_MISC_GP regs) */
33*4882a593Smuzhiyun pinmux_config_drvgrp_table(dalmore_padctrl,
34*4882a593Smuzhiyun ARRAY_SIZE(dalmore_padctrl));
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #if defined(CONFIG_MMC_SDHCI_TEGRA)
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * Do I2C/PMU writes to bring up SD card bus power
40*4882a593Smuzhiyun *
41*4882a593Smuzhiyun */
board_sdmmc_voltage_init(void)42*4882a593Smuzhiyun void board_sdmmc_voltage_init(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun struct udevice *dev;
45*4882a593Smuzhiyun uchar reg, data_buffer[1];
46*4882a593Smuzhiyun int ret;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
49*4882a593Smuzhiyun if (ret) {
50*4882a593Smuzhiyun debug("%s: Cannot find PMIC I2C chip\n", __func__);
51*4882a593Smuzhiyun return;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* TPS65913: LDO9_VOLTAGE = 3.3V */
55*4882a593Smuzhiyun data_buffer[0] = 0x31;
56*4882a593Smuzhiyun reg = 0x61;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun ret = dm_i2c_write(dev, reg, data_buffer, 1);
59*4882a593Smuzhiyun if (ret)
60*4882a593Smuzhiyun printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
61*4882a593Smuzhiyun __func__, reg, data_buffer[0], ret);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* TPS65913: LDO9_CTRL = Active */
64*4882a593Smuzhiyun data_buffer[0] = 0x01;
65*4882a593Smuzhiyun reg = 0x60;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun ret = dm_i2c_write(dev, reg, data_buffer, 1);
68*4882a593Smuzhiyun if (ret)
69*4882a593Smuzhiyun printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
70*4882a593Smuzhiyun __func__, reg, data_buffer[0], ret);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* TPS65090: FET6_CTRL = enable output auto discharge, enable FET6 */
73*4882a593Smuzhiyun data_buffer[0] = 0x03;
74*4882a593Smuzhiyun reg = 0x14;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun ret = i2c_get_chip_for_busnum(0, BAT_I2C_ADDRESS, 1, &dev);
77*4882a593Smuzhiyun if (ret) {
78*4882a593Smuzhiyun debug("%s: Cannot find charger I2C chip\n", __func__);
79*4882a593Smuzhiyun return;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun ret = dm_i2c_write(dev, reg, data_buffer, 1);
82*4882a593Smuzhiyun if (ret)
83*4882a593Smuzhiyun printf("%s: BAT i2c_write %02X<-%02X returned %d\n",
84*4882a593Smuzhiyun __func__, reg, data_buffer[0], ret);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun * Routine: pin_mux_mmc
89*4882a593Smuzhiyun * Description: setup the MMC muxes, power rails, etc.
90*4882a593Smuzhiyun */
pin_mux_mmc(void)91*4882a593Smuzhiyun void pin_mux_mmc(void)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun /*
94*4882a593Smuzhiyun * NOTE: We don't do mmc-specific pin muxes here.
95*4882a593Smuzhiyun * They were done globally in pinmux_init().
96*4882a593Smuzhiyun */
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* Bring up the SDIO3 power rail */
99*4882a593Smuzhiyun board_sdmmc_voltage_init();
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun #endif /* MMC */
102