1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2012
3*4882a593Smuzhiyun * Ивайло Димитров <freemangordon@abv.bg>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2011-2012
6*4882a593Smuzhiyun * Pali Rohár <pali.rohar@gmail.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * (C) Copyright 2010
9*4882a593Smuzhiyun * Alistair Buxton <a.j.buxton@gmail.com>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Derived from Beagle Board and 3430 SDP code:
12*4882a593Smuzhiyun * (C) Copyright 2004-2008
13*4882a593Smuzhiyun * Texas Instruments, <www.ti.com>
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * Author :
16*4882a593Smuzhiyun * Sunil Kumar <sunilsaini05@gmail.com>
17*4882a593Smuzhiyun * Shashi Ranjan <shashiranjanmca05@gmail.com>
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * Richard Woodruff <r-woodruff2@ti.com>
20*4882a593Smuzhiyun * Syed Mohammed Khasim <khasim@ti.com>
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <common.h>
26*4882a593Smuzhiyun #include <watchdog.h>
27*4882a593Smuzhiyun #include <malloc.h>
28*4882a593Smuzhiyun #include <twl4030.h>
29*4882a593Smuzhiyun #include <i2c.h>
30*4882a593Smuzhiyun #include <video_fb.h>
31*4882a593Smuzhiyun #include <asm/io.h>
32*4882a593Smuzhiyun #include <asm/setup.h>
33*4882a593Smuzhiyun #include <asm/bitops.h>
34*4882a593Smuzhiyun #include <asm/mach-types.h>
35*4882a593Smuzhiyun #include <asm/arch/mux.h>
36*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
37*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #include "rx51.h"
40*4882a593Smuzhiyun #include "tag_omap.h"
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun GraphicDevice gdev;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun const omap3_sysinfo sysinfo = {
47*4882a593Smuzhiyun DDR_STACKED,
48*4882a593Smuzhiyun "Nokia RX-51",
49*4882a593Smuzhiyun "OneNAND"
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* This structure contains default omap tags needed for booting Maemo 5 */
53*4882a593Smuzhiyun static struct tag_omap omap[] = {
54*4882a593Smuzhiyun OMAP_TAG_UART_CONFIG(0x04),
55*4882a593Smuzhiyun OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
56*4882a593Smuzhiyun OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
57*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
58*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
59*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
60*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
61*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
62*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
63*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
64*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
65*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
66*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
67*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
68*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
69*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
70*4882a593Smuzhiyun OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
71*4882a593Smuzhiyun OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
72*4882a593Smuzhiyun OMAP_TAG_PARTITION_CONFIG(PART1_NAME, PART1_SIZE * PART1_MULL,
73*4882a593Smuzhiyun PART1_OFFS, PART1_MASK),
74*4882a593Smuzhiyun OMAP_TAG_PARTITION_CONFIG(PART2_NAME, PART2_SIZE * PART2_MULL,
75*4882a593Smuzhiyun PART2_OFFS, PART2_MASK),
76*4882a593Smuzhiyun OMAP_TAG_PARTITION_CONFIG(PART3_NAME, PART3_SIZE * PART3_MULL,
77*4882a593Smuzhiyun PART3_OFFS, PART3_MASK),
78*4882a593Smuzhiyun OMAP_TAG_PARTITION_CONFIG(PART4_NAME, PART4_SIZE * PART4_MULL,
79*4882a593Smuzhiyun PART4_OFFS, PART4_MASK),
80*4882a593Smuzhiyun OMAP_TAG_PARTITION_CONFIG(PART5_NAME, PART5_SIZE * PART5_MULL,
81*4882a593Smuzhiyun PART5_OFFS, PART5_MASK),
82*4882a593Smuzhiyun OMAP_TAG_PARTITION_CONFIG(PART6_NAME, PART6_SIZE * PART6_MULL,
83*4882a593Smuzhiyun PART6_OFFS, PART6_MASK),
84*4882a593Smuzhiyun OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
85*4882a593Smuzhiyun OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
86*4882a593Smuzhiyun OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
87*4882a593Smuzhiyun OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
88*4882a593Smuzhiyun OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
89*4882a593Smuzhiyun { }
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun static char *boot_reason_ptr;
93*4882a593Smuzhiyun static char *hw_build_ptr;
94*4882a593Smuzhiyun static char *nolo_version_ptr;
95*4882a593Smuzhiyun static char *boot_mode_ptr;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /*
98*4882a593Smuzhiyun * Routine: init_omap_tags
99*4882a593Smuzhiyun * Description: Initialize pointers to values in tag_omap
100*4882a593Smuzhiyun */
init_omap_tags(void)101*4882a593Smuzhiyun static void init_omap_tags(void)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun char *component;
104*4882a593Smuzhiyun char *version;
105*4882a593Smuzhiyun int i = 0;
106*4882a593Smuzhiyun while (omap[i].hdr.tag) {
107*4882a593Smuzhiyun switch (omap[i].hdr.tag) {
108*4882a593Smuzhiyun case OMAP_TAG_BOOT_REASON:
109*4882a593Smuzhiyun boot_reason_ptr = omap[i].u.boot_reason.reason_str;
110*4882a593Smuzhiyun break;
111*4882a593Smuzhiyun case OMAP_TAG_VERSION_STR:
112*4882a593Smuzhiyun component = omap[i].u.version.component;
113*4882a593Smuzhiyun version = omap[i].u.version.version;
114*4882a593Smuzhiyun if (strcmp(component, "hw-build") == 0)
115*4882a593Smuzhiyun hw_build_ptr = version;
116*4882a593Smuzhiyun else if (strcmp(component, "nolo") == 0)
117*4882a593Smuzhiyun nolo_version_ptr = version;
118*4882a593Smuzhiyun else if (strcmp(component, "boot-mode") == 0)
119*4882a593Smuzhiyun boot_mode_ptr = version;
120*4882a593Smuzhiyun break;
121*4882a593Smuzhiyun default:
122*4882a593Smuzhiyun break;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun i++;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
reuse_omap_atags(struct tag_omap * t)128*4882a593Smuzhiyun static void reuse_omap_atags(struct tag_omap *t)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun char *component;
131*4882a593Smuzhiyun char *version;
132*4882a593Smuzhiyun while (t->hdr.tag) {
133*4882a593Smuzhiyun switch (t->hdr.tag) {
134*4882a593Smuzhiyun case OMAP_TAG_BOOT_REASON:
135*4882a593Smuzhiyun memset(boot_reason_ptr, 0, 12);
136*4882a593Smuzhiyun strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
137*4882a593Smuzhiyun break;
138*4882a593Smuzhiyun case OMAP_TAG_VERSION_STR:
139*4882a593Smuzhiyun component = t->u.version.component;
140*4882a593Smuzhiyun version = t->u.version.version;
141*4882a593Smuzhiyun if (strcmp(component, "hw-build") == 0) {
142*4882a593Smuzhiyun memset(hw_build_ptr, 0, 12);
143*4882a593Smuzhiyun strcpy(hw_build_ptr, version);
144*4882a593Smuzhiyun } else if (strcmp(component, "nolo") == 0) {
145*4882a593Smuzhiyun memset(nolo_version_ptr, 0, 12);
146*4882a593Smuzhiyun strcpy(nolo_version_ptr, version);
147*4882a593Smuzhiyun } else if (strcmp(component, "boot-mode") == 0) {
148*4882a593Smuzhiyun memset(boot_mode_ptr, 0, 12);
149*4882a593Smuzhiyun strcpy(boot_mode_ptr, version);
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun break;
152*4882a593Smuzhiyun default:
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun t = tag_omap_next(t);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /*
160*4882a593Smuzhiyun * Routine: reuse_atags
161*4882a593Smuzhiyun * Description: Reuse atags from previous bootloader.
162*4882a593Smuzhiyun * Reuse only only HW build, boot reason, boot mode and nolo
163*4882a593Smuzhiyun */
reuse_atags(void)164*4882a593Smuzhiyun static void reuse_atags(void)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun struct tag *t = (struct tag *)gd->bd->bi_boot_params;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* First tag must be ATAG_CORE */
169*4882a593Smuzhiyun if (t->hdr.tag != ATAG_CORE)
170*4882a593Smuzhiyun return;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (!boot_reason_ptr || !hw_build_ptr)
173*4882a593Smuzhiyun return;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /* Last tag must be ATAG_NONE */
176*4882a593Smuzhiyun while (t->hdr.tag != ATAG_NONE) {
177*4882a593Smuzhiyun switch (t->hdr.tag) {
178*4882a593Smuzhiyun case ATAG_REVISION:
179*4882a593Smuzhiyun memset(hw_build_ptr, 0, 12);
180*4882a593Smuzhiyun sprintf(hw_build_ptr, "%x", t->u.revision.rev);
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun case ATAG_BOARD:
183*4882a593Smuzhiyun reuse_omap_atags((struct tag_omap *)&t->u);
184*4882a593Smuzhiyun break;
185*4882a593Smuzhiyun default:
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun t = tag_next(t);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /*
193*4882a593Smuzhiyun * Routine: board_init
194*4882a593Smuzhiyun * Description: Early hardware init.
195*4882a593Smuzhiyun */
board_init(void)196*4882a593Smuzhiyun int board_init(void)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun /* in SRAM or SDRAM, finish GPMC */
199*4882a593Smuzhiyun gpmc_init();
200*4882a593Smuzhiyun /* boot param addr */
201*4882a593Smuzhiyun gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /*
206*4882a593Smuzhiyun * Routine: get_board_revision
207*4882a593Smuzhiyun * Description: Return board revision.
208*4882a593Smuzhiyun */
get_board_rev(void)209*4882a593Smuzhiyun u32 get_board_rev(void)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun return simple_strtol(hw_build_ptr, NULL, 16);
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /*
215*4882a593Smuzhiyun * Routine: setup_board_tags
216*4882a593Smuzhiyun * Description: Append board specific boot tags.
217*4882a593Smuzhiyun */
setup_board_tags(struct tag ** in_params)218*4882a593Smuzhiyun void setup_board_tags(struct tag **in_params)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun int setup_console_atag;
221*4882a593Smuzhiyun char *setup_boot_reason_atag;
222*4882a593Smuzhiyun char *setup_boot_mode_atag;
223*4882a593Smuzhiyun char *str;
224*4882a593Smuzhiyun int i;
225*4882a593Smuzhiyun int size;
226*4882a593Smuzhiyun int total_size;
227*4882a593Smuzhiyun struct tag *params;
228*4882a593Smuzhiyun struct tag_omap *t;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun params = (struct tag *)gd->bd->bi_boot_params;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun params->u.core.flags = 0x0;
233*4882a593Smuzhiyun params->u.core.pagesize = 0x1000;
234*4882a593Smuzhiyun params->u.core.rootdev = 0x0;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /* append omap atag only if env setup_omap_atag is set to 1 */
237*4882a593Smuzhiyun str = env_get("setup_omap_atag");
238*4882a593Smuzhiyun if (!str || str[0] != '1')
239*4882a593Smuzhiyun return;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun str = env_get("setup_console_atag");
242*4882a593Smuzhiyun if (str && str[0] == '1')
243*4882a593Smuzhiyun setup_console_atag = 1;
244*4882a593Smuzhiyun else
245*4882a593Smuzhiyun setup_console_atag = 0;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun setup_boot_reason_atag = env_get("setup_boot_reason_atag");
248*4882a593Smuzhiyun setup_boot_mode_atag = env_get("setup_boot_mode_atag");
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun params = *in_params;
251*4882a593Smuzhiyun t = (struct tag_omap *)¶ms->u;
252*4882a593Smuzhiyun total_size = sizeof(struct tag_header);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun for (i = 0; omap[i].hdr.tag; i++) {
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /* skip serial console tag */
257*4882a593Smuzhiyun if (!setup_console_atag &&
258*4882a593Smuzhiyun omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
259*4882a593Smuzhiyun continue;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun size = omap[i].hdr.size + sizeof(struct tag_omap_header);
262*4882a593Smuzhiyun memcpy(t, &omap[i], size);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* set uart tag to 0 - disable serial console */
265*4882a593Smuzhiyun if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
266*4882a593Smuzhiyun t->u.uart.enabled_uarts = 0;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun /* change boot reason */
269*4882a593Smuzhiyun if (setup_boot_reason_atag &&
270*4882a593Smuzhiyun omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
271*4882a593Smuzhiyun memset(t->u.boot_reason.reason_str, 0, 12);
272*4882a593Smuzhiyun strcpy(t->u.boot_reason.reason_str,
273*4882a593Smuzhiyun setup_boot_reason_atag);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* change boot mode */
277*4882a593Smuzhiyun if (setup_boot_mode_atag &&
278*4882a593Smuzhiyun omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
279*4882a593Smuzhiyun strcmp(omap[i].u.version.component, "boot-mode") == 0) {
280*4882a593Smuzhiyun memset(t->u.version.version, 0, 12);
281*4882a593Smuzhiyun strcpy(t->u.version.version, setup_boot_mode_atag);
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun total_size += size;
285*4882a593Smuzhiyun t = tag_omap_next(t);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun params->hdr.tag = ATAG_BOARD;
290*4882a593Smuzhiyun params->hdr.size = total_size >> 2;
291*4882a593Smuzhiyun params = tag_next(params);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun *in_params = params;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /*
297*4882a593Smuzhiyun * Routine: video_hw_init
298*4882a593Smuzhiyun * Description: Set up the GraphicDevice depending on sys_boot.
299*4882a593Smuzhiyun */
video_hw_init(void)300*4882a593Smuzhiyun void *video_hw_init(void)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun /* fill in Graphic Device */
303*4882a593Smuzhiyun gdev.frameAdrs = 0x8f9c0000;
304*4882a593Smuzhiyun gdev.winSizeX = 800;
305*4882a593Smuzhiyun gdev.winSizeY = 480;
306*4882a593Smuzhiyun gdev.gdfBytesPP = 2;
307*4882a593Smuzhiyun gdev.gdfIndex = GDF_16BIT_565RGB;
308*4882a593Smuzhiyun memset((void *)gdev.frameAdrs, 0, 0xbb800);
309*4882a593Smuzhiyun return (void *) &gdev;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun * Routine: twl4030_regulator_set_mode
314*4882a593Smuzhiyun * Description: Set twl4030 regulator mode over i2c powerbus.
315*4882a593Smuzhiyun */
twl4030_regulator_set_mode(u8 id,u8 mode)316*4882a593Smuzhiyun static void twl4030_regulator_set_mode(u8 id, u8 mode)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
319*4882a593Smuzhiyun twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
320*4882a593Smuzhiyun TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
321*4882a593Smuzhiyun twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
322*4882a593Smuzhiyun TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
omap3_emu_romcode_call(u32 service_id,u32 * parameters)325*4882a593Smuzhiyun static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun u32 i, num_params = *parameters;
328*4882a593Smuzhiyun u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /*
331*4882a593Smuzhiyun * copy the parameters to an un-cached area to avoid coherency
332*4882a593Smuzhiyun * issues
333*4882a593Smuzhiyun */
334*4882a593Smuzhiyun for (i = 0; i < num_params; i++) {
335*4882a593Smuzhiyun __raw_writel(*parameters, sram_scratch_space);
336*4882a593Smuzhiyun parameters++;
337*4882a593Smuzhiyun sram_scratch_space++;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun /* Now make the PPA call */
341*4882a593Smuzhiyun do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
omap3_set_aux_cr_secure(u32 acr)344*4882a593Smuzhiyun void omap3_set_aux_cr_secure(u32 acr)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun struct emu_hal_params_rx51 emu_romcode_params = { 0, };
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun emu_romcode_params.num_params = 2;
349*4882a593Smuzhiyun emu_romcode_params.param1 = acr;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
352*4882a593Smuzhiyun (u32 *)&emu_romcode_params);
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /*
356*4882a593Smuzhiyun * Routine: omap3_update_aux_cr_secure_rx51
357*4882a593Smuzhiyun * Description: Modify the contents Auxiliary Control Register.
358*4882a593Smuzhiyun * Parameters:
359*4882a593Smuzhiyun * set_bits - bits to set in ACR
360*4882a593Smuzhiyun * clr_bits - bits to clear in ACR
361*4882a593Smuzhiyun */
omap3_update_aux_cr_secure_rx51(u32 set_bits,u32 clear_bits)362*4882a593Smuzhiyun static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun u32 acr;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun /* Read ACR */
367*4882a593Smuzhiyun asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
368*4882a593Smuzhiyun acr &= ~clear_bits;
369*4882a593Smuzhiyun acr |= set_bits;
370*4882a593Smuzhiyun omap3_set_aux_cr_secure(acr);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /*
374*4882a593Smuzhiyun * Routine: misc_init_r
375*4882a593Smuzhiyun * Description: Configure board specific parts.
376*4882a593Smuzhiyun */
misc_init_r(void)377*4882a593Smuzhiyun int misc_init_r(void)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun char buf[12];
380*4882a593Smuzhiyun u8 state;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /* reset lp5523 led */
383*4882a593Smuzhiyun i2c_set_bus_num(1);
384*4882a593Smuzhiyun state = 0xff;
385*4882a593Smuzhiyun i2c_write(0x32, 0x3d, 1, &state, 1);
386*4882a593Smuzhiyun i2c_set_bus_num(0);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /* initialize twl4030 power managment */
389*4882a593Smuzhiyun twl4030_power_init();
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /* set VSIM to 1.8V */
392*4882a593Smuzhiyun twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
393*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VSIM_VSEL_18,
394*4882a593Smuzhiyun TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
395*4882a593Smuzhiyun TWL4030_PM_RECEIVER_DEV_GRP_P1);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* store I2C access state */
398*4882a593Smuzhiyun twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
399*4882a593Smuzhiyun &state);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun /* enable I2C access to powerbus (needed for twl4030 regulator) */
402*4882a593Smuzhiyun twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
403*4882a593Smuzhiyun 0x02);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
406*4882a593Smuzhiyun twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
407*4882a593Smuzhiyun twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
408*4882a593Smuzhiyun twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /* restore I2C access state */
411*4882a593Smuzhiyun twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
412*4882a593Smuzhiyun state);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun /* set env variable attkernaddr for relocated kernel */
415*4882a593Smuzhiyun sprintf(buf, "%#x", KERNEL_ADDRESS);
416*4882a593Smuzhiyun env_set("attkernaddr", buf);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun /* initialize omap tags */
419*4882a593Smuzhiyun init_omap_tags();
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /* reuse atags from previous bootloader */
422*4882a593Smuzhiyun reuse_atags();
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun omap_die_id_display();
425*4882a593Smuzhiyun print_cpuinfo();
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun /*
428*4882a593Smuzhiyun * Cortex-A8(r1p0..r1p2) errata 430973 workaround
429*4882a593Smuzhiyun * Set IBE bit in Auxiliary Control Register
430*4882a593Smuzhiyun *
431*4882a593Smuzhiyun * Call this routine only on real secure device
432*4882a593Smuzhiyun * Qemu does not implement secure PPA and crash
433*4882a593Smuzhiyun */
434*4882a593Smuzhiyun if (get_device_type() == HS_DEVICE)
435*4882a593Smuzhiyun omap3_update_aux_cr_secure_rx51(1 << 6, 0);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun return 0;
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun /*
441*4882a593Smuzhiyun * Routine: set_muxconf_regs
442*4882a593Smuzhiyun * Description: Setting up the configuration Mux registers specific to the
443*4882a593Smuzhiyun * hardware. Many pins need to be moved from protect to primary
444*4882a593Smuzhiyun * mode.
445*4882a593Smuzhiyun */
set_muxconf_regs(void)446*4882a593Smuzhiyun void set_muxconf_regs(void)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun MUX_RX51();
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun static unsigned long int twl_wd_time; /* last time of watchdog reset */
452*4882a593Smuzhiyun static unsigned long int twl_i2c_lock;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun /*
455*4882a593Smuzhiyun * Routine: hw_watchdog_reset
456*4882a593Smuzhiyun * Description: Reset timeout of twl4030 watchdog.
457*4882a593Smuzhiyun */
hw_watchdog_reset(void)458*4882a593Smuzhiyun void hw_watchdog_reset(void)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun u8 timeout = 0;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /* do not reset watchdog too often - max every 4s */
463*4882a593Smuzhiyun if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
464*4882a593Smuzhiyun return;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /* localy lock twl4030 i2c bus */
467*4882a593Smuzhiyun if (test_and_set_bit(0, &twl_i2c_lock))
468*4882a593Smuzhiyun return;
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun /* read actual watchdog timeout */
471*4882a593Smuzhiyun twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
472*4882a593Smuzhiyun TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun /* timeout 0 means watchdog is disabled */
475*4882a593Smuzhiyun /* reset watchdog timeout to 31s (maximum) */
476*4882a593Smuzhiyun if (timeout != 0)
477*4882a593Smuzhiyun twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
478*4882a593Smuzhiyun TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun /* store last watchdog reset time */
481*4882a593Smuzhiyun twl_wd_time = get_timer(0);
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* localy unlock twl4030 i2c bus */
484*4882a593Smuzhiyun test_and_clear_bit(0, &twl_i2c_lock);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /*
488*4882a593Smuzhiyun * TWL4030 keypad handler for cfb_console
489*4882a593Smuzhiyun */
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun static const char keymap[] = {
492*4882a593Smuzhiyun /* normal */
493*4882a593Smuzhiyun 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
494*4882a593Smuzhiyun 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
495*4882a593Smuzhiyun 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
496*4882a593Smuzhiyun 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
497*4882a593Smuzhiyun 't', 0, 0, 0, 0, 0, 0, 0,
498*4882a593Smuzhiyun 'y', 0, 0, 0, 0, 0, 0, 0,
499*4882a593Smuzhiyun 'u', 0, 0, 0, 0, 0, 0, 0,
500*4882a593Smuzhiyun 'i', 5, 6, 0, 0, 0, 0, 0,
501*4882a593Smuzhiyun /* fn */
502*4882a593Smuzhiyun '1', '9', '0', '=', '\b', 0, '*', '+',
503*4882a593Smuzhiyun '2', '#', '-', '_', '(', ')', '&', '!',
504*4882a593Smuzhiyun '3', '?', '^', '\r', 0, 156, '$', 238,
505*4882a593Smuzhiyun '4', '/', '\\', '"', '\'', '@', 0, '<',
506*4882a593Smuzhiyun '5', '|', '>', 0, 0, 0, 0, 0,
507*4882a593Smuzhiyun '6', 0, 0, 0, 0, 0, 0, 0,
508*4882a593Smuzhiyun '7', 0, 0, 0, 0, 0, 0, 0,
509*4882a593Smuzhiyun '8', 16, 17, 0, 0, 0, 0, 0,
510*4882a593Smuzhiyun };
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun static u8 keys[8];
513*4882a593Smuzhiyun static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
514*4882a593Smuzhiyun #define KEYBUF_SIZE 32
515*4882a593Smuzhiyun static u8 keybuf[KEYBUF_SIZE];
516*4882a593Smuzhiyun static u8 keybuf_head;
517*4882a593Smuzhiyun static u8 keybuf_tail;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /*
520*4882a593Smuzhiyun * Routine: rx51_kp_init
521*4882a593Smuzhiyun * Description: Initialize HW keyboard.
522*4882a593Smuzhiyun */
rx51_kp_init(void)523*4882a593Smuzhiyun int rx51_kp_init(void)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun int ret = 0;
526*4882a593Smuzhiyun u8 ctrl;
527*4882a593Smuzhiyun ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
528*4882a593Smuzhiyun TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun if (ret)
531*4882a593Smuzhiyun return ret;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun /* turn on keyboard and use hardware scanning */
534*4882a593Smuzhiyun ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
535*4882a593Smuzhiyun ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
536*4882a593Smuzhiyun ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
537*4882a593Smuzhiyun ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
538*4882a593Smuzhiyun TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
539*4882a593Smuzhiyun /* enable key event status */
540*4882a593Smuzhiyun ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
541*4882a593Smuzhiyun TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
542*4882a593Smuzhiyun /* enable interrupt generation on rising and falling */
543*4882a593Smuzhiyun /* this is a workaround for qemu twl4030 emulation */
544*4882a593Smuzhiyun ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
545*4882a593Smuzhiyun TWL4030_KEYPAD_KEYP_EDR, 0x57);
546*4882a593Smuzhiyun /* enable ISR clear on read */
547*4882a593Smuzhiyun ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
548*4882a593Smuzhiyun TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
549*4882a593Smuzhiyun return 0;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun
rx51_kp_fill(u8 k,u8 mods)552*4882a593Smuzhiyun static void rx51_kp_fill(u8 k, u8 mods)
553*4882a593Smuzhiyun {
554*4882a593Smuzhiyun /* check if some cursor key without meta fn key was pressed */
555*4882a593Smuzhiyun if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
556*4882a593Smuzhiyun keybuf[keybuf_tail++] = '\e';
557*4882a593Smuzhiyun keybuf_tail %= KEYBUF_SIZE;
558*4882a593Smuzhiyun keybuf[keybuf_tail++] = '[';
559*4882a593Smuzhiyun keybuf_tail %= KEYBUF_SIZE;
560*4882a593Smuzhiyun if (k == 18) /* up */
561*4882a593Smuzhiyun keybuf[keybuf_tail++] = 'A';
562*4882a593Smuzhiyun else if (k == 31) /* left */
563*4882a593Smuzhiyun keybuf[keybuf_tail++] = 'D';
564*4882a593Smuzhiyun else if (k == 33) /* down */
565*4882a593Smuzhiyun keybuf[keybuf_tail++] = 'B';
566*4882a593Smuzhiyun else if (k == 34) /* right */
567*4882a593Smuzhiyun keybuf[keybuf_tail++] = 'C';
568*4882a593Smuzhiyun keybuf_tail %= KEYBUF_SIZE;
569*4882a593Smuzhiyun return;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun if (mods & 2) { /* fn meta key was pressed */
573*4882a593Smuzhiyun k = keymap[k+64];
574*4882a593Smuzhiyun } else {
575*4882a593Smuzhiyun k = keymap[k];
576*4882a593Smuzhiyun if (mods & 1) { /* ctrl key was pressed */
577*4882a593Smuzhiyun if (k >= 'a' && k <= 'z')
578*4882a593Smuzhiyun k -= 'a' - 1;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun if (mods & 4) { /* shift key was pressed */
581*4882a593Smuzhiyun if (k >= 'a' && k <= 'z')
582*4882a593Smuzhiyun k += 'A' - 'a';
583*4882a593Smuzhiyun else if (k == '.')
584*4882a593Smuzhiyun k = ':';
585*4882a593Smuzhiyun else if (k == ',')
586*4882a593Smuzhiyun k = ';';
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun keybuf[keybuf_tail++] = k;
590*4882a593Smuzhiyun keybuf_tail %= KEYBUF_SIZE;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun /*
594*4882a593Smuzhiyun * Routine: rx51_kp_tstc
595*4882a593Smuzhiyun * Description: Test if key was pressed (from buffer).
596*4882a593Smuzhiyun */
rx51_kp_tstc(struct stdio_dev * sdev)597*4882a593Smuzhiyun int rx51_kp_tstc(struct stdio_dev *sdev)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun u8 c, r, dk, i;
600*4882a593Smuzhiyun u8 intr;
601*4882a593Smuzhiyun u8 mods;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun /* localy lock twl4030 i2c bus */
604*4882a593Smuzhiyun if (test_and_set_bit(0, &twl_i2c_lock))
605*4882a593Smuzhiyun return 0;
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun /* twl4030 remembers up to 2 events */
608*4882a593Smuzhiyun for (i = 0; i < 2; i++) {
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun /* check interrupt register for events */
611*4882a593Smuzhiyun twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
612*4882a593Smuzhiyun TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun /* no event */
615*4882a593Smuzhiyun if (!(intr&1))
616*4882a593Smuzhiyun continue;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun /* read the key state */
619*4882a593Smuzhiyun i2c_read(TWL4030_CHIP_KEYPAD,
620*4882a593Smuzhiyun TWL4030_KEYPAD_FULL_CODE_7_0, 1, keys, 8);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /* cut out modifier keys from the keystate */
623*4882a593Smuzhiyun mods = keys[4] >> 4;
624*4882a593Smuzhiyun keys[4] &= 0x0f;
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun for (c = 0; c < 8; c++) {
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun /* get newly pressed keys only */
629*4882a593Smuzhiyun dk = ((keys[c] ^ old_keys[c])&keys[c]);
630*4882a593Smuzhiyun old_keys[c] = keys[c];
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun /* fill the keybuf */
633*4882a593Smuzhiyun for (r = 0; r < 8; r++) {
634*4882a593Smuzhiyun if (dk&1)
635*4882a593Smuzhiyun rx51_kp_fill((c*8)+r, mods);
636*4882a593Smuzhiyun dk = dk >> 1;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun /* localy unlock twl4030 i2c bus */
644*4882a593Smuzhiyun test_and_clear_bit(0, &twl_i2c_lock);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun /*
650*4882a593Smuzhiyun * Routine: rx51_kp_getc
651*4882a593Smuzhiyun * Description: Get last pressed key (from buffer).
652*4882a593Smuzhiyun */
rx51_kp_getc(struct stdio_dev * sdev)653*4882a593Smuzhiyun int rx51_kp_getc(struct stdio_dev *sdev)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun keybuf_head %= KEYBUF_SIZE;
656*4882a593Smuzhiyun while (!rx51_kp_tstc(sdev))
657*4882a593Smuzhiyun WATCHDOG_RESET();
658*4882a593Smuzhiyun return keybuf[keybuf_head++];
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun /*
662*4882a593Smuzhiyun * Routine: board_mmc_init
663*4882a593Smuzhiyun * Description: Initialize mmc devices.
664*4882a593Smuzhiyun */
board_mmc_init(bd_t * bis)665*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
666*4882a593Smuzhiyun {
667*4882a593Smuzhiyun omap_mmc_init(0, 0, 0, -1, -1);
668*4882a593Smuzhiyun omap_mmc_init(1, 0, 0, -1, -1);
669*4882a593Smuzhiyun return 0;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun
board_mmc_power_init(void)672*4882a593Smuzhiyun void board_mmc_power_init(void)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun twl4030_power_mmc_init(0);
675*4882a593Smuzhiyun twl4030_power_mmc_init(1);
676*4882a593Smuzhiyun }
677