1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2008
3*4882a593Smuzhiyun * Mark Jonas <mark.jonas@de.bosch.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * board/mpr2/mpr2.c
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <asm/io.h>
12*4882a593Smuzhiyun #include <asm/processor.h>
13*4882a593Smuzhiyun
checkboard(void)14*4882a593Smuzhiyun int checkboard(void)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun puts("BOARD: MPR2\n");
17*4882a593Smuzhiyun return 0;
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun
board_init(void)20*4882a593Smuzhiyun int board_init(void)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * For MPR2 A.3 through A.7
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* CS2: Ethernet (0xA8000000 - 0xABFFFFFF) */
27*4882a593Smuzhiyun __raw_writel(0x36db0400, CS2BCR); /* 4 idle cycles, normal space, 16 bit data bus */
28*4882a593Smuzhiyun __raw_writel(0x000003c0, CS2WCR); /* (WR:8), no ext. wait */
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* CS4: CAN1 (0xB0000000 - 0xB3FFFFFF) */
31*4882a593Smuzhiyun __raw_writel(0x00000200, CS4BCR); /* no idle cycles, normal space, 8 bit data bus */
32*4882a593Smuzhiyun __raw_writel(0x00100981, CS4WCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* CS5a: CAN2 (0xB4000000 - 0xB5FFFFFF) */
35*4882a593Smuzhiyun __raw_writel(0x00000200, CS5ABCR); /* no idle cycles, normal space, 8 bit data bus */
36*4882a593Smuzhiyun __raw_writel(0x00100981, CS5AWCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /* CS5b: CAN3 (0xB6000000 - 0xB7FFFFFF) */
39*4882a593Smuzhiyun __raw_writel(0x00000200, CS5BBCR); /* no idle cycles, normal space, 8 bit data bus */
40*4882a593Smuzhiyun __raw_writel(0x00100981, CS5BWCR); /* (SW:1.5 WR:3 HW:1.5), ext. wait */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* CS6a: Rotary (0xB8000000 - 0xB9FFFFFF) */
43*4882a593Smuzhiyun __raw_writel(0x00000200, CS6ABCR); /* no idle cycles, normal space, 8 bit data bus */
44*4882a593Smuzhiyun __raw_writel(0x001009C1, CS6AWCR); /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /* set Pin Select Register A: /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND */
47*4882a593Smuzhiyun __raw_writew(0xAABC, PSELA); /* 10 10 10 10 10 11 11 00 */
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* set Pin Select Register B: /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved */
50*4882a593Smuzhiyun __raw_writew(0x3C00, PSELB); /* 0 0 11 11 0 0 00000000 */
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun /* set Pin Select Register C: SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved */
53*4882a593Smuzhiyun __raw_writew(0x0000, PSELC); /* 00 00 00 00 00000000 */
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved */
56*4882a593Smuzhiyun __raw_writew(0x0000, PSELD); /* 0 00 00 00 00 00 00 00 0 */
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* OTH: (00) Other fuction
59*4882a593Smuzhiyun * GPO: (01) General Purpose Output
60*4882a593Smuzhiyun * GPI: (11) General Purpose Input
61*4882a593Smuzhiyun * GPI+: (10) General Purpose Input with internal pull-up
62*4882a593Smuzhiyun *-------------------------------------------------------
63*4882a593Smuzhiyun * A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
64*4882a593Smuzhiyun * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); */
65*4882a593Smuzhiyun __raw_writew(0x5555, PACR); /* 01 01 01 01 01 01 01 01 */
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
68*4882a593Smuzhiyun * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); */
69*4882a593Smuzhiyun __raw_writew(0x5555, PBCR); /* 01 01 01 01 01 01 01 01 */
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
72*4882a593Smuzhiyun * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; */
73*4882a593Smuzhiyun __raw_writew(0x5500, PCCR); /* 01 01 01 01 00 00 00 00 */
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
76*4882a593Smuzhiyun * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); */
77*4882a593Smuzhiyun __raw_writew(0x5555, PDCR); /* 01 01 01 01 01 01 01 01 */
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
80*4882a593Smuzhiyun * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; */
81*4882a593Smuzhiyun __raw_writew(0x2800, PECR); /* 00 10 10 00 00 00 00 00 */
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
84*4882a593Smuzhiyun * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); */
85*4882a593Smuzhiyun __raw_writew(0x0002, PFCR); /* 00 00 00 00 00 00 00 10 */
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ);G4 GPI(KEY2);
88*4882a593Smuzhiyun * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); */
89*4882a593Smuzhiyun __raw_writew(0x03D5, PGCR); /* 00 00 00 11 11 01 01 01 */
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
92*4882a593Smuzhiyun * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; */
93*4882a593Smuzhiyun __raw_writew(0x0050, PHCR); /* 00 00 00 00 01 01 00 00 */
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
96*4882a593Smuzhiyun * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; */
97*4882a593Smuzhiyun __raw_writew(0x0000, PJCR); /* 00 00 00 00 00 00 00 00 */
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* K7 (x); K6 (x); K5 (x); K4 (x)
100*4882a593Smuzhiyun * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nc); K0 PINT4(FLASH_READY); */
101*4882a593Smuzhiyun __raw_writew(0x00FB, PKCR); /* 00 00 00 00 11 11 10 11 */
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
104*4882a593Smuzhiyun * L3 TCK; L2 (x); L1 (x); L0 (x); */
105*4882a593Smuzhiyun __raw_writew(0x0000, PLCR); /* 00 00 00 00 00 00 00 00 */
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* M7 GPO(CURRENT_SINK);M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); M4 GPO(LAN_RESET);
108*4882a593Smuzhiyun * M3 GPO(BUZZER); M2 GPO(LCD_BL); M1 CS5B(CAN3_CS); M0 GPI+(nc); */
109*4882a593Smuzhiyun __raw_writew(0x5552, PMCR); /* 01 01 01 01 01 01 00 10 */
110*4882a593Smuzhiyun __raw_writeb(0xF0, PMDR); /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, LAN_RESET=off, BUZZER=off, LCD_BL=off */
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* P7 (x); P6 (x); P5 (x); P4 GPO(on pullup);
113*4882a593Smuzhiyun * P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ); */
114*4882a593Smuzhiyun __raw_writew(0x0100, PPCR); /* 00 00 00 01 00 00 00 00 */
115*4882a593Smuzhiyun __raw_writeb(0x10, PPDR); /* no current flow through pullup */
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* R7 A25; R6 A24; R5 A23; R4 A22;
118*4882a593Smuzhiyun * R3 A21; R2 A20; R1 A19; R0 A0; */
119*4882a593Smuzhiyun __raw_writew(0x0000, PRCR); /* 00 00 00 00 00 00 00 00 */
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
122*4882a593Smuzhiyun * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; */
123*4882a593Smuzhiyun __raw_writew(0x0140, PSCR); /* 00 00 00 01 01 00 00 00 */
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
126*4882a593Smuzhiyun * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG); */
127*4882a593Smuzhiyun __raw_writew(0x0001, PTCR); /* 00 00 00 00 00 00 00 01 */
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
130*4882a593Smuzhiyun * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; */
131*4882a593Smuzhiyun __raw_writew(0x0240, PUCR); /* 00 00 00 10 01 00 00 00 */
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
134*4882a593Smuzhiyun * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); */
135*4882a593Smuzhiyun __raw_writew(0x0142, PVCR); /* 00 00 00 01 01 00 00 10 */
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun return 0;
138*4882a593Smuzhiyun }
139