1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2008-2009 Stefan Roese <sr@denx.de>, DENX Software Engineering 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define DCGU_BASE 0x00084000 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun /* Relative offsets of the register adresses */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define DCGU_CLK_EN1_OFFS 0x00000010 12*4882a593Smuzhiyun #define DCGU_CLK_EN1(base) ((base) + DCGU_CLK_EN1_OFFS) 13*4882a593Smuzhiyun #define DCGU_CLK_EN2_OFFS 0x00000014 14*4882a593Smuzhiyun #define DCGU_CLK_EN2(base) ((base) + DCGU_CLK_EN2_OFFS) 15*4882a593Smuzhiyun #define DCGU_RESET_UNIT1_OFFS 0x00000018 16*4882a593Smuzhiyun #define DCGU_RESET_UNIT1(base) ((base) + DCGU_RESET_UNIT1_OFFS) 17*4882a593Smuzhiyun #define DCGU_USBPHY_STAT_OFFS 0x00000054 18*4882a593Smuzhiyun #define DCGU_USBPHY_STAT(base) ((base) + DCGU_USBPHY_STAT_OFFS) 19*4882a593Smuzhiyun #define DCGU_EN_WDT_RESET_OFFS 0x00000064 20*4882a593Smuzhiyun #define DCGU_EN_WDT_RESET(base) ((base) + DCGU_EN_WDT_RESET_OFFS) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* The magic value to write in order to activate the WDT */ 23*4882a593Smuzhiyun #define DCGU_MAGIC_WDT 0x1909 24