1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2016 David Lechner <david@lechnology.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Based on da850evm.c
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on da830evm.c. Original Copyrights follow:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
11*4882a593Smuzhiyun * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <common.h>
17*4882a593Smuzhiyun #include <i2c.h>
18*4882a593Smuzhiyun #include <net.h>
19*4882a593Smuzhiyun #include <netdev.h>
20*4882a593Smuzhiyun #include <spi.h>
21*4882a593Smuzhiyun #include <spi_flash.h>
22*4882a593Smuzhiyun #include <asm/arch/hardware.h>
23*4882a593Smuzhiyun #include <asm/arch/pinmux_defs.h>
24*4882a593Smuzhiyun #include <asm/io.h>
25*4882a593Smuzhiyun #include <asm/arch/davinci_misc.h>
26*4882a593Smuzhiyun #include <linux/errno.h>
27*4882a593Smuzhiyun #include <hwconfig.h>
28*4882a593Smuzhiyun #include <asm/mach-types.h>
29*4882a593Smuzhiyun #include <asm/setup.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #ifdef CONFIG_MMC_DAVINCI
32*4882a593Smuzhiyun #include <mmc.h>
33*4882a593Smuzhiyun #include <asm/arch/sdmmc_defs.h>
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun u8 board_rev;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define EEPROM_I2C_ADDR 0x50
41*4882a593Smuzhiyun #define EEPROM_REV_OFFSET 0x3F00
42*4882a593Smuzhiyun #define EEPROM_MAC_OFFSET 0x3F06
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #ifdef CONFIG_MMC_DAVINCI
45*4882a593Smuzhiyun static struct davinci_mmc mmc_sd0 = {
46*4882a593Smuzhiyun .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
47*4882a593Smuzhiyun .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */
48*4882a593Smuzhiyun .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
49*4882a593Smuzhiyun .version = MMC_CTLR_VERSION_2,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
board_mmc_init(bd_t * bis)52*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* Add slot-0 to mmc subsystem */
57*4882a593Smuzhiyun return davinci_mmc_init(bis, &mmc_sd0);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun #endif
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun const struct pinmux_resource pinmuxes[] = {
62*4882a593Smuzhiyun PINMUX_ITEM(spi0_pins_base),
63*4882a593Smuzhiyun PINMUX_ITEM(spi0_pins_scs0),
64*4882a593Smuzhiyun PINMUX_ITEM(uart1_pins_txrx),
65*4882a593Smuzhiyun PINMUX_ITEM(i2c0_pins),
66*4882a593Smuzhiyun PINMUX_ITEM(mmc0_pins),
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun const int pinmuxes_size = ARRAY_SIZE(pinmuxes);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun const struct lpsc_resource lpsc[] = {
72*4882a593Smuzhiyun { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
73*4882a593Smuzhiyun { DAVINCI_LPSC_UART1 }, /* console */
74*4882a593Smuzhiyun { DAVINCI_LPSC_MMC_SD },
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun const int lpsc_size = ARRAY_SIZE(lpsc);
78*4882a593Smuzhiyun
get_board_rev(void)79*4882a593Smuzhiyun u32 get_board_rev(void)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun u8 buf[2];
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (!board_rev) {
84*4882a593Smuzhiyun if (i2c_read(EEPROM_I2C_ADDR, EEPROM_REV_OFFSET, 2, buf, 2)) {
85*4882a593Smuzhiyun printf("\nBoard revision read failed!\n");
86*4882a593Smuzhiyun } else {
87*4882a593Smuzhiyun /*
88*4882a593Smuzhiyun * Board rev 3 has MAC address at EEPROM_REV_OFFSET.
89*4882a593Smuzhiyun * Other revisions have checksum at EEPROM_REV_OFFSET+1
90*4882a593Smuzhiyun * to detect this.
91*4882a593Smuzhiyun */
92*4882a593Smuzhiyun if ((buf[0] ^ buf[1]) == 0xFF)
93*4882a593Smuzhiyun board_rev = buf[0];
94*4882a593Smuzhiyun else
95*4882a593Smuzhiyun board_rev = 3;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return board_rev;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /*
103*4882a593Smuzhiyun * The Bluetooth MAC address serves as the board serial number.
104*4882a593Smuzhiyun */
get_board_serial(struct tag_serialnr * serialnr)105*4882a593Smuzhiyun void get_board_serial(struct tag_serialnr *serialnr)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun u32 offset;
108*4882a593Smuzhiyun u8 buf[6];
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (!board_rev)
111*4882a593Smuzhiyun board_rev = get_board_rev();
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* Board rev 3 has MAC address where rev should be */
114*4882a593Smuzhiyun offset = (board_rev == 3) ? EEPROM_REV_OFFSET : EEPROM_MAC_OFFSET;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (i2c_read(EEPROM_I2C_ADDR, offset, 2, buf, 6)) {
117*4882a593Smuzhiyun printf("\nBoard serial read failed!\n");
118*4882a593Smuzhiyun } else {
119*4882a593Smuzhiyun u8 *nr;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun nr = (u8 *)&serialnr->low;
122*4882a593Smuzhiyun nr[0] = buf[5];
123*4882a593Smuzhiyun nr[1] = buf[4];
124*4882a593Smuzhiyun nr[2] = buf[3];
125*4882a593Smuzhiyun nr[3] = buf[2];
126*4882a593Smuzhiyun nr = (u8 *)&serialnr->high;
127*4882a593Smuzhiyun nr[0] = buf[1];
128*4882a593Smuzhiyun nr[1] = buf[0];
129*4882a593Smuzhiyun nr[2] = 0;
130*4882a593Smuzhiyun nr[3] = 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
board_early_init_f(void)134*4882a593Smuzhiyun int board_early_init_f(void)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun * Power on required peripherals
138*4882a593Smuzhiyun * ARM does not have access by default to PSC0 and PSC1
139*4882a593Smuzhiyun * assuming here that the DSP bootloader has set the IOPU
140*4882a593Smuzhiyun * such that PSC access is available to ARM
141*4882a593Smuzhiyun */
142*4882a593Smuzhiyun if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
143*4882a593Smuzhiyun return 1;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return 0;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
board_init(void)148*4882a593Smuzhiyun int board_init(void)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun irq_init();
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* arch number of the board */
153*4882a593Smuzhiyun /* LEGO didn't register for a unique number and uses da850evm */
154*4882a593Smuzhiyun gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* address of boot parameters */
157*4882a593Smuzhiyun gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /* setup the SUSPSRC for ARM to control emulation suspend */
160*4882a593Smuzhiyun writel(readl(&davinci_syscfg_regs->suspsrc) &
161*4882a593Smuzhiyun ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
162*4882a593Smuzhiyun DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
163*4882a593Smuzhiyun DAVINCI_SYSCFG_SUSPSRC_UART1),
164*4882a593Smuzhiyun &davinci_syscfg_regs->suspsrc);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /* configure pinmux settings */
167*4882a593Smuzhiyun if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
168*4882a593Smuzhiyun return 1;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* enable the console UART */
171*4882a593Smuzhiyun writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
172*4882a593Smuzhiyun DAVINCI_UART_PWREMU_MGMT_UTRST),
173*4882a593Smuzhiyun &davinci_uart1_ctrl_regs->pwremu_mgmt);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177