1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2013 Keymile AG 3*4882a593Smuzhiyun * Valentin Longchamp <valentin.longchamp@keymile.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* QRIO GPIO ports */ 9*4882a593Smuzhiyun #define GPIO_A 0x40 10*4882a593Smuzhiyun #define GPIO_B 0x60 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun int qrio_get_gpio(u8 port_off, u8 gpio_nr); 13*4882a593Smuzhiyun void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); 14*4882a593Smuzhiyun void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); 15*4882a593Smuzhiyun void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); 16*4882a593Smuzhiyun void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 19*4882a593Smuzhiyun #define PRSTCFG_POWUP_UNIT_RST 0x1 20*4882a593Smuzhiyun #define PRSTCFG_POWUP_RST 0x3 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun void qrio_prst(u8 bit, bool en, bool wden); 23*4882a593Smuzhiyun void qrio_wdmask(u8 bit, bool wden); 24*4882a593Smuzhiyun void qrio_prstcfg(u8 bit, u8 mode); 25*4882a593Smuzhiyun void qrio_set_leds(void); 26*4882a593Smuzhiyun void qrio_enable_app_buffer(void); 27*4882a593Smuzhiyun void qrio_cpuwd_flag(bool flag); 28*4882a593Smuzhiyun int qrio_reset_reason(void); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define UPREQ_UNIT_RST 0x0 31*4882a593Smuzhiyun #define UPREQ_CORE_RST 0x1 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun void qrio_uprstreq(u8 mode); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun void pci_of_setup(void *blob, bd_t *bd); 36