1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2011
3*4882a593Smuzhiyun * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <i2c.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <linux/ctype.h>
12*4882a593Smuzhiyun #include "../common/common.h"
13*4882a593Smuzhiyun
i2c_write_start_seq(void)14*4882a593Smuzhiyun static void i2c_write_start_seq(void)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun struct fsl_i2c_base *base;
17*4882a593Smuzhiyun base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
18*4882a593Smuzhiyun CONFIG_SYS_I2C_OFFSET);
19*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
20*4882a593Smuzhiyun out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
21*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
22*4882a593Smuzhiyun out_8(&base->cr, (I2C_CR_MEN));
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun
i2c_make_abort(void)25*4882a593Smuzhiyun int i2c_make_abort(void)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun struct fsl_i2c_base *base;
28*4882a593Smuzhiyun base = (struct fsl_i2c_base *)(CONFIG_SYS_IMMR +
29*4882a593Smuzhiyun CONFIG_SYS_I2C_OFFSET);
30*4882a593Smuzhiyun uchar last;
31*4882a593Smuzhiyun int nbr_read = 0;
32*4882a593Smuzhiyun int i = 0;
33*4882a593Smuzhiyun int ret = 0;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* wait after each operation to finsh with a delay */
36*4882a593Smuzhiyun out_8(&base->cr, (I2C_CR_MSTA));
37*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
38*4882a593Smuzhiyun out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA));
39*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
40*4882a593Smuzhiyun in_8(&base->dr);
41*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
42*4882a593Smuzhiyun last = in_8(&base->dr);
43*4882a593Smuzhiyun nbr_read++;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun * do read until the last bit is 1, but stop if the full eeprom is
47*4882a593Smuzhiyun * read.
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun while (((last & 0x01) != 0x01) &&
50*4882a593Smuzhiyun (nbr_read < CONFIG_SYS_IVM_EEPROM_MAX_LEN)) {
51*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
52*4882a593Smuzhiyun last = in_8(&base->dr);
53*4882a593Smuzhiyun nbr_read++;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun if ((last & 0x01) != 0x01)
56*4882a593Smuzhiyun ret = -2;
57*4882a593Smuzhiyun if ((last != 0xff) || (nbr_read > 1))
58*4882a593Smuzhiyun printf("[INFO] i2c abort after %d bytes (0x%02x)\n",
59*4882a593Smuzhiyun nbr_read, last);
60*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
61*4882a593Smuzhiyun out_8(&base->cr, (I2C_CR_MEN));
62*4882a593Smuzhiyun udelay(DELAY_ABORT_SEQ);
63*4882a593Smuzhiyun /* clear status reg */
64*4882a593Smuzhiyun out_8(&base->sr, 0);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun for (i = 0; i < 5; i++)
67*4882a593Smuzhiyun i2c_write_start_seq();
68*4882a593Smuzhiyun if (ret != 0)
69*4882a593Smuzhiyun printf("[ERROR] i2c abort failed after %d bytes (0x%02x)\n",
70*4882a593Smuzhiyun nbr_read, last);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return ret;
73*4882a593Smuzhiyun }
74