1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <errno.h>
10*4882a593Smuzhiyun #include <pci.h>
11*4882a593Smuzhiyun #include <smsc_sio1007.h>
12*4882a593Smuzhiyun #include <asm/ibmpc.h>
13*4882a593Smuzhiyun #include <asm/lpc_common.h>
14*4882a593Smuzhiyun #include <asm/pci.h>
15*4882a593Smuzhiyun #include <asm/arch/pch.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define SIO1007_RUNTIME_IOPORT 0x180
18*4882a593Smuzhiyun
board_early_init_f(void)19*4882a593Smuzhiyun int board_early_init_f(void)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun struct udevice *pch;
22*4882a593Smuzhiyun int ret;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun ret = uclass_first_device(UCLASS_PCH, &pch);
25*4882a593Smuzhiyun if (ret)
26*4882a593Smuzhiyun return ret;
27*4882a593Smuzhiyun if (!pch)
28*4882a593Smuzhiyun return -ENODEV;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* Initialize LPC interface to turn on superio chipset decode range */
31*4882a593Smuzhiyun dm_pci_write_config16(pch, LPC_IO_DEC, COMA_DEC_RANGE | COMB_DEC_RANGE);
32*4882a593Smuzhiyun dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | COMA_LPC_EN);
33*4882a593Smuzhiyun dm_pci_write_config32(pch, LPC_GEN1_DEC, GEN_DEC_RANGE_256B |
34*4882a593Smuzhiyun (SIO1007_IOPORT3 & 0xff00) | GEN_DEC_RANGE_EN);
35*4882a593Smuzhiyun dm_pci_write_config32(pch, LPC_GEN2_DEC, GEN_DEC_RANGE_16B |
36*4882a593Smuzhiyun SIO1007_RUNTIME_IOPORT | GEN_DEC_RANGE_EN);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /* Enable legacy serial port at 0x3f8 */
39*4882a593Smuzhiyun sio1007_enable_serial(SIO1007_IOPORT3, 0, UART0_BASE, UART0_IRQ);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Enable SIO1007 runtime I/O port at 0x180 */
42*4882a593Smuzhiyun sio1007_enable_runtime(SIO1007_IOPORT3, SIO1007_RUNTIME_IOPORT);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /*
45*4882a593Smuzhiyun * On Cougar Canyon 2 board, the RS232 transiver connected to serial
46*4882a593Smuzhiyun * port 0 (0x3f8) is controlled by a GPIO pin (GPIO10) on the SIO1007.
47*4882a593Smuzhiyun * Set the pin value to 1 to enable the RS232 transiver.
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun sio1007_gpio_config(SIO1007_IOPORT3, 0, GPIO_DIR_OUTPUT,
50*4882a593Smuzhiyun GPIO_POL_NO_INVERT, GPIO_TYPE_PUSH_PULL);
51*4882a593Smuzhiyun sio1007_gpio_set_value(SIO1007_RUNTIME_IOPORT, 0, 1);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return 0;
54*4882a593Smuzhiyun }
55