1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Based on ti/evm/evm.c
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/arch/mem.h>
12*4882a593Smuzhiyun #include <asm/arch/mmc_host_def.h>
13*4882a593Smuzhiyun #include <asm/arch/mux.h>
14*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
15*4882a593Smuzhiyun #include <asm/mach-types.h>
16*4882a593Smuzhiyun #include <asm/gpio.h>
17*4882a593Smuzhiyun #include <asm/omap_gpio.h>
18*4882a593Smuzhiyun #include <asm/arch/dss.h>
19*4882a593Smuzhiyun #include <asm/arch/clock.h>
20*4882a593Smuzhiyun #include <errno.h>
21*4882a593Smuzhiyun #include <i2c.h>
22*4882a593Smuzhiyun #ifdef CONFIG_USB_EHCI_HCD
23*4882a593Smuzhiyun #include <usb.h>
24*4882a593Smuzhiyun #include <asm/ehci-omap.h>
25*4882a593Smuzhiyun #endif
26*4882a593Smuzhiyun #include "mcx.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define HOT_WATER_BUTTON 42
31*4882a593Smuzhiyun #define LCD_OUTPUT 55
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* Address of the framebuffer in RAM. */
34*4882a593Smuzhiyun #define FB_START_ADDRESS 0x88000000
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #ifdef CONFIG_USB_EHCI_HCD
37*4882a593Smuzhiyun static struct omap_usbhs_board_data usbhs_bdata = {
38*4882a593Smuzhiyun .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
39*4882a593Smuzhiyun .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
40*4882a593Smuzhiyun .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)43*4882a593Smuzhiyun int ehci_hcd_init(int index, enum usb_init_type init,
44*4882a593Smuzhiyun struct ehci_hccr **hccr, struct ehci_hcor **hcor)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
ehci_hcd_stop(int index)49*4882a593Smuzhiyun int ehci_hcd_stop(int index)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return omap_ehci_hcd_stop();
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun #endif
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun * Routine: board_init
57*4882a593Smuzhiyun * Description: Early hardware init.
58*4882a593Smuzhiyun */
board_init(void)59*4882a593Smuzhiyun int board_init(void)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
62*4882a593Smuzhiyun /* boot param addr */
63*4882a593Smuzhiyun gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun gpio_direction_output(LCD_OUTPUT, 0);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun return 0;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #ifdef CONFIG_BOARD_LATE_INIT
board_late_init(void)71*4882a593Smuzhiyun int board_late_init(void)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun if (gpio_request(HOT_WATER_BUTTON, "hot-water-button") < 0) {
74*4882a593Smuzhiyun puts("Failed to get hot-water-button pin\n");
75*4882a593Smuzhiyun return -ENODEV;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun gpio_direction_input(HOT_WATER_BUTTON);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /*
80*4882a593Smuzhiyun * if hot-water-button is pressed
81*4882a593Smuzhiyun * change bootcmd
82*4882a593Smuzhiyun */
83*4882a593Smuzhiyun if (gpio_get_value(HOT_WATER_BUTTON))
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun env_set("bootcmd", "run swupdate");
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /*
93*4882a593Smuzhiyun * Routine: set_muxconf_regs
94*4882a593Smuzhiyun * Description: Setting up the configuration Mux registers specific to the
95*4882a593Smuzhiyun * hardware. Many pins need to be moved from protect to primary
96*4882a593Smuzhiyun * mode.
97*4882a593Smuzhiyun */
set_muxconf_regs(void)98*4882a593Smuzhiyun void set_muxconf_regs(void)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun MUX_MCX();
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun #if defined(CONFIG_MMC_OMAP_HS)
board_mmc_init(bd_t * bis)104*4882a593Smuzhiyun int board_mmc_init(bd_t *bis)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun return omap_mmc_init(0, 0, 0, -1, -1);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun #endif
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun #if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun static struct panel_config lcd_cfg = {
113*4882a593Smuzhiyun .timing_h = PANEL_TIMING_H(40, 40, 48),
114*4882a593Smuzhiyun .timing_v = PANEL_TIMING_V(29, 13, 3),
115*4882a593Smuzhiyun .pol_freq = 0x00003000, /* Pol Freq */
116*4882a593Smuzhiyun .divisor = 0x0001000E,
117*4882a593Smuzhiyun .panel_type = 0x01, /* TFT */
118*4882a593Smuzhiyun .data_lines = 0x03, /* 24 Bit RGB */
119*4882a593Smuzhiyun .load_mode = 0x02, /* Frame Mode */
120*4882a593Smuzhiyun .panel_color = 0,
121*4882a593Smuzhiyun .lcd_size = PANEL_LCD_SIZE(800, 480),
122*4882a593Smuzhiyun .gfx_format = GFXFORMAT_RGB24_UNPACKED,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
board_video_init(void)125*4882a593Smuzhiyun int board_video_init(void)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
128*4882a593Smuzhiyun void *fb;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun fb = (void *)FB_START_ADDRESS;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun lcd_cfg.frame_buffer = fb;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
135*4882a593Smuzhiyun setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun omap3_dss_panel_config(&lcd_cfg);
138*4882a593Smuzhiyun omap3_dss_enable();
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun return 0;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun #endif
143