1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2010-2011 Calxeda, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <ahci.h>
9*4882a593Smuzhiyun #include <netdev.h>
10*4882a593Smuzhiyun #include <scsi.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/sizes.h>
13*4882a593Smuzhiyun #include <asm/io.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define HB_AHCI_BASE 0xffe08000
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define HB_SCU_A9_PWR_STATUS 0xfff10008
18*4882a593Smuzhiyun #define HB_SREG_A9_PWR_REQ 0xfff3cf00
19*4882a593Smuzhiyun #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
20*4882a593Smuzhiyun #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
21*4882a593Smuzhiyun #define HB_SREG_A15_PWR_CTRL 0xfff3c200
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define HB_PWR_SUSPEND 0
24*4882a593Smuzhiyun #define HB_PWR_SOFT_RESET 1
25*4882a593Smuzhiyun #define HB_PWR_HARD_RESET 2
26*4882a593Smuzhiyun #define HB_PWR_SHUTDOWN 3
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define PWRDOM_STAT_SATA 0x80000000
29*4882a593Smuzhiyun #define PWRDOM_STAT_PCI 0x40000000
30*4882a593Smuzhiyun #define PWRDOM_STAT_EMMC 0x20000000
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define HB_SCU_A9_PWR_NORMAL 0
33*4882a593Smuzhiyun #define HB_SCU_A9_PWR_DORMANT 2
34*4882a593Smuzhiyun #define HB_SCU_A9_PWR_OFF 3
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun void cphy_disable_overrides(void);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * Miscellaneous platform dependent initialisations
42*4882a593Smuzhiyun */
board_init(void)43*4882a593Smuzhiyun int board_init(void)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun icache_enable();
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun return 0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* We know all the init functions have been run now */
board_eth_init(bd_t * bis)51*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun int rc = 0;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #ifdef CONFIG_CALXEDA_XGMAC
56*4882a593Smuzhiyun rc += calxedaxgmac_initialize(0, 0xfff50000);
57*4882a593Smuzhiyun rc += calxedaxgmac_initialize(1, 0xfff51000);
58*4882a593Smuzhiyun #endif
59*4882a593Smuzhiyun return rc;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #ifdef CONFIG_SCSI_AHCI_PLAT
scsi_init(void)63*4882a593Smuzhiyun void scsi_init(void)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun cphy_disable_overrides();
68*4882a593Smuzhiyun if (reg & PWRDOM_STAT_SATA) {
69*4882a593Smuzhiyun ahci_init((void __iomem *)HB_AHCI_BASE);
70*4882a593Smuzhiyun scsi_scan(true);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun #endif
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #ifdef CONFIG_MISC_INIT_R
misc_init_r(void)76*4882a593Smuzhiyun int misc_init_r(void)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun char envbuffer[16];
79*4882a593Smuzhiyun u32 boot_choice;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
82*4882a593Smuzhiyun sprintf(envbuffer, "bootcmd%d", boot_choice);
83*4882a593Smuzhiyun if (env_get(envbuffer)) {
84*4882a593Smuzhiyun sprintf(envbuffer, "run bootcmd%d", boot_choice);
85*4882a593Smuzhiyun env_set("bootcmd", envbuffer);
86*4882a593Smuzhiyun } else
87*4882a593Smuzhiyun env_set("bootcmd", "");
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun
dram_init(void)93*4882a593Smuzhiyun int dram_init(void)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun gd->ram_size = SZ_512M;
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun #if defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * fdt,bd_t * bd)100*4882a593Smuzhiyun int ft_board_setup(void *fdt, bd_t *bd)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun static const char disabled[] = "disabled";
103*4882a593Smuzhiyun u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun if (!(reg & PWRDOM_STAT_SATA))
106*4882a593Smuzhiyun do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
107*4882a593Smuzhiyun disabled, sizeof(disabled), 1);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (!(reg & PWRDOM_STAT_EMMC))
110*4882a593Smuzhiyun do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
111*4882a593Smuzhiyun disabled, sizeof(disabled), 1);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun return 0;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun #endif
116*4882a593Smuzhiyun
is_highbank(void)117*4882a593Smuzhiyun static int is_highbank(void)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun uint32_t midr;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return (midr & 0xfff0) == 0xc090;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
reset_cpu(ulong addr)126*4882a593Smuzhiyun void reset_cpu(ulong addr)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
129*4882a593Smuzhiyun if (is_highbank())
130*4882a593Smuzhiyun writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
131*4882a593Smuzhiyun else
132*4882a593Smuzhiyun writel(0x1, HB_SREG_A15_PWR_CTRL);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun wfi();
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /*
138*4882a593Smuzhiyun * turn off the override before transferring control to Linux, since Linux
139*4882a593Smuzhiyun * may not support spread spectrum.
140*4882a593Smuzhiyun */
arch_preboot_os(void)141*4882a593Smuzhiyun void arch_preboot_os(void)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun cphy_disable_overrides();
144*4882a593Smuzhiyun }
145