1*4882a593Smuzhiyunif TARGET_CHROMEBOOK_SAMUS 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig SYS_BOARD 4*4882a593Smuzhiyun default "chromebook_samus" 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig SYS_VENDOR 7*4882a593Smuzhiyun default "google" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunconfig SYS_SOC 10*4882a593Smuzhiyun default "broadwell" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunconfig SYS_CONFIG_NAME 13*4882a593Smuzhiyun default "chromebook_samus" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunconfig SYS_TEXT_BASE 16*4882a593Smuzhiyun default 0xffe00000 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunconfig BOARD_SPECIFIC_OPTIONS # dummy 19*4882a593Smuzhiyun def_bool y 20*4882a593Smuzhiyun select X86_RESET_VECTOR 21*4882a593Smuzhiyun select INTEL_BROADWELL 22*4882a593Smuzhiyun select HAVE_INTEL_ME 23*4882a593Smuzhiyun select BOARD_ROMSIZE_KB_8192 24*4882a593Smuzhiyun select SPI_FLASH_WINBOND 25*4882a593Smuzhiyun 26*4882a593Smuzhiyunconfig PCIE_ECAM_BASE 27*4882a593Smuzhiyun default 0xf0000000 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunconfig EARLY_POST_CROS_EC 30*4882a593Smuzhiyun bool "Enable early post to Chrome OS EC" 31*4882a593Smuzhiyun default y 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunconfig SYS_CAR_ADDR 34*4882a593Smuzhiyun hex 35*4882a593Smuzhiyun default 0xff7c0000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunconfig SYS_CAR_SIZE 38*4882a593Smuzhiyun hex 39*4882a593Smuzhiyun default 0x40000 40*4882a593Smuzhiyun 41*4882a593Smuzhiyunendif 42