1*4882a593Smuzhiyunif TARGET_CHROMEBOOK_LINK || TARGET_CHROMEBOOK_LINK64 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig SYS_BOARD 4*4882a593Smuzhiyun default "chromebook_link" 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig SYS_VENDOR 7*4882a593Smuzhiyun default "google" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunconfig SYS_SOC 10*4882a593Smuzhiyun default "ivybridge" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunconfig SYS_CONFIG_NAME 13*4882a593Smuzhiyun default "chromebook_link" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunconfig SYS_TEXT_BASE 16*4882a593Smuzhiyun default 0xfff00000 if !SUPPORT_SPL 17*4882a593Smuzhiyun default 0x10000000 if SUPPORT_SPL 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunconfig BOARD_SPECIFIC_OPTIONS # dummy 20*4882a593Smuzhiyun def_bool y 21*4882a593Smuzhiyun select X86_RESET_VECTOR 22*4882a593Smuzhiyun select NORTHBRIDGE_INTEL_IVYBRIDGE 23*4882a593Smuzhiyun select HAVE_INTEL_ME 24*4882a593Smuzhiyun select BOARD_ROMSIZE_KB_8192 25*4882a593Smuzhiyun select SPI_FLASH_WINBOND 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunconfig PCIE_ECAM_BASE 28*4882a593Smuzhiyun default 0xf0000000 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunconfig EARLY_POST_CROS_EC 31*4882a593Smuzhiyun bool "Enable early post to Chrome OS EC" 32*4882a593Smuzhiyun default y 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunconfig SYS_CAR_ADDR 35*4882a593Smuzhiyun hex 36*4882a593Smuzhiyun default 0xff7e0000 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunconfig SYS_CAR_SIZE 39*4882a593Smuzhiyun hex 40*4882a593Smuzhiyun default 0x20000 41*4882a593Smuzhiyun 42*4882a593Smuzhiyunendif 43