1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2013
3*4882a593Smuzhiyun * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <gdsys_fpga.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <asm/io.h>
12*4882a593Smuzhiyun
fpga_set_reg(u32 fpga,u16 * reg,off_t regoff,u16 data)13*4882a593Smuzhiyun int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun out_le16(reg, data);
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun return 0;
18*4882a593Smuzhiyun }
19*4882a593Smuzhiyun
fpga_get_reg(u32 fpga,u16 * reg,off_t regoff,u16 * data)20*4882a593Smuzhiyun int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun *data = in_le16(reg);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun return 0;
25*4882a593Smuzhiyun }
26