xref: /OK3568_Linux_fs/u-boot/board/gdsys/a38x/hre.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2013
3*4882a593Smuzhiyun  * Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <malloc.h>
10*4882a593Smuzhiyun #include <fs.h>
11*4882a593Smuzhiyun #include <i2c.h>
12*4882a593Smuzhiyun #include <mmc.h>
13*4882a593Smuzhiyun #include <tpm.h>
14*4882a593Smuzhiyun #include <u-boot/sha1.h>
15*4882a593Smuzhiyun #include <asm/byteorder.h>
16*4882a593Smuzhiyun #include <asm/unaligned.h>
17*4882a593Smuzhiyun #include <pca9698.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "hre.h"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* other constants */
22*4882a593Smuzhiyun enum {
23*4882a593Smuzhiyun 	ESDHC_BOOT_IMAGE_SIG_OFS	= 0x40,
24*4882a593Smuzhiyun 	ESDHC_BOOT_IMAGE_SIZE_OFS	= 0x48,
25*4882a593Smuzhiyun 	ESDHC_BOOT_IMAGE_ADDR_OFS	= 0x50,
26*4882a593Smuzhiyun 	ESDHC_BOOT_IMAGE_TARGET_OFS	= 0x58,
27*4882a593Smuzhiyun 	ESDHC_BOOT_IMAGE_ENTRY_OFS	= 0x60,
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun enum {
31*4882a593Smuzhiyun 	I2C_SOC_0 = 0,
32*4882a593Smuzhiyun 	I2C_SOC_1 = 1,
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun enum access_mode {
36*4882a593Smuzhiyun 	HREG_NONE	= 0,
37*4882a593Smuzhiyun 	HREG_RD		= 1,
38*4882a593Smuzhiyun 	HREG_WR		= 2,
39*4882a593Smuzhiyun 	HREG_RDWR	= 3,
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /* register constants */
43*4882a593Smuzhiyun enum {
44*4882a593Smuzhiyun 	FIX_HREG_DEVICE_ID_HASH	= 0,
45*4882a593Smuzhiyun 	FIX_HREG_UNUSED1	= 1,
46*4882a593Smuzhiyun 	FIX_HREG_UNUSED2	= 2,
47*4882a593Smuzhiyun 	FIX_HREG_VENDOR		= 3,
48*4882a593Smuzhiyun 	COUNT_FIX_HREGS
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static struct h_reg pcr_hregs[24];
52*4882a593Smuzhiyun static struct h_reg fix_hregs[COUNT_FIX_HREGS];
53*4882a593Smuzhiyun static struct h_reg var_hregs[8];
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* hre opcodes */
56*4882a593Smuzhiyun enum {
57*4882a593Smuzhiyun 	/* opcodes w/o data */
58*4882a593Smuzhiyun 	HRE_NOP		= 0x00,
59*4882a593Smuzhiyun 	HRE_SYNC	= HRE_NOP,
60*4882a593Smuzhiyun 	HRE_CHECK0	= 0x01,
61*4882a593Smuzhiyun 	/* opcodes w/o data, w/ sync dst */
62*4882a593Smuzhiyun 	/* opcodes w/ data */
63*4882a593Smuzhiyun 	HRE_LOAD	= 0x81,
64*4882a593Smuzhiyun 	/* opcodes w/data, w/sync dst */
65*4882a593Smuzhiyun 	HRE_XOR		= 0xC1,
66*4882a593Smuzhiyun 	HRE_AND		= 0xC2,
67*4882a593Smuzhiyun 	HRE_OR		= 0xC3,
68*4882a593Smuzhiyun 	HRE_EXTEND	= 0xC4,
69*4882a593Smuzhiyun 	HRE_LOADKEY	= 0xC5,
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* hre errors */
73*4882a593Smuzhiyun enum {
74*4882a593Smuzhiyun 	HRE_E_OK	= 0,
75*4882a593Smuzhiyun 	HRE_E_TPM_FAILURE,
76*4882a593Smuzhiyun 	HRE_E_INVALID_HREG,
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun static uint64_t device_id;
80*4882a593Smuzhiyun static uint64_t device_cl;
81*4882a593Smuzhiyun static uint64_t device_type;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static uint32_t platform_key_handle;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun static uint32_t hre_tpm_err;
86*4882a593Smuzhiyun static int hre_err = HRE_E_OK;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define IS_PCR_HREG(spec) ((spec) & 0x20)
89*4882a593Smuzhiyun #define IS_FIX_HREG(spec) (((spec) & 0x38) == 0x08)
90*4882a593Smuzhiyun #define IS_VAR_HREG(spec) (((spec) & 0x38) == 0x10)
91*4882a593Smuzhiyun #define HREG_IDX(spec) ((spec) & (IS_PCR_HREG(spec) ? 0x1f : 0x7))
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun static const uint8_t vendor[] = "Guntermann & Drunck";
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /**
96*4882a593Smuzhiyun  * @brief get the size of a given (TPM) NV area
97*4882a593Smuzhiyun  * @param index	NV index of the area to get size for
98*4882a593Smuzhiyun  * @param size	pointer to the size
99*4882a593Smuzhiyun  * @return 0 on success, != 0 on error
100*4882a593Smuzhiyun  */
get_tpm_nv_size(uint32_t index,uint32_t * size)101*4882a593Smuzhiyun static int get_tpm_nv_size(uint32_t index, uint32_t *size)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	uint32_t err;
104*4882a593Smuzhiyun 	uint8_t info[72];
105*4882a593Smuzhiyun 	uint8_t *ptr;
106*4882a593Smuzhiyun 	uint16_t v16;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	err = tpm_get_capability(TPM_CAP_NV_INDEX, index,
109*4882a593Smuzhiyun 		info, sizeof(info));
110*4882a593Smuzhiyun 	if (err) {
111*4882a593Smuzhiyun 		printf("tpm_get_capability(CAP_NV_INDEX, %08x) failed: %u\n",
112*4882a593Smuzhiyun 		       index, err);
113*4882a593Smuzhiyun 		return 1;
114*4882a593Smuzhiyun 	}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* skip tag and nvIndex */
117*4882a593Smuzhiyun 	ptr = info + 6;
118*4882a593Smuzhiyun 	/* skip 2 pcr info fields */
119*4882a593Smuzhiyun 	v16 = get_unaligned_be16(ptr);
120*4882a593Smuzhiyun 	ptr += 2 + v16 + 1 + 20;
121*4882a593Smuzhiyun 	v16 = get_unaligned_be16(ptr);
122*4882a593Smuzhiyun 	ptr += 2 + v16 + 1 + 20;
123*4882a593Smuzhiyun 	/* skip permission and flags */
124*4882a593Smuzhiyun 	ptr += 6 + 3;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	*size = get_unaligned_be32(ptr);
127*4882a593Smuzhiyun 	return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /**
131*4882a593Smuzhiyun  * @brief search for a key by usage auth and pub key hash.
132*4882a593Smuzhiyun  * @param auth	usage auth of the key to search for
133*4882a593Smuzhiyun  * @param pubkey_digest	(SHA1) hash of the pub key structure of the key
134*4882a593Smuzhiyun  * @param[out] handle	the handle of the key iff found
135*4882a593Smuzhiyun  * @return 0 if key was found in TPM; != 0 if not.
136*4882a593Smuzhiyun  */
find_key(const uint8_t auth[20],const uint8_t pubkey_digest[20],uint32_t * handle)137*4882a593Smuzhiyun static int find_key(const uint8_t auth[20], const uint8_t pubkey_digest[20],
138*4882a593Smuzhiyun 		uint32_t *handle)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	uint16_t key_count;
141*4882a593Smuzhiyun 	uint32_t key_handles[10];
142*4882a593Smuzhiyun 	uint8_t buf[288];
143*4882a593Smuzhiyun 	uint8_t *ptr;
144*4882a593Smuzhiyun 	uint32_t err;
145*4882a593Smuzhiyun 	uint8_t digest[20];
146*4882a593Smuzhiyun 	size_t buf_len;
147*4882a593Smuzhiyun 	unsigned int i;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	/* fetch list of already loaded keys in the TPM */
150*4882a593Smuzhiyun 	err = tpm_get_capability(TPM_CAP_HANDLE, TPM_RT_KEY, buf, sizeof(buf));
151*4882a593Smuzhiyun 	if (err)
152*4882a593Smuzhiyun 		return -1;
153*4882a593Smuzhiyun 	key_count = get_unaligned_be16(buf);
154*4882a593Smuzhiyun 	ptr = buf + 2;
155*4882a593Smuzhiyun 	for (i = 0; i < key_count; ++i, ptr += 4)
156*4882a593Smuzhiyun 		key_handles[i] = get_unaligned_be32(ptr);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* now search a(/ the) key which we can access with the given auth */
159*4882a593Smuzhiyun 	for (i = 0; i < key_count; ++i) {
160*4882a593Smuzhiyun 		buf_len = sizeof(buf);
161*4882a593Smuzhiyun 		err = tpm_get_pub_key_oiap(key_handles[i], auth, buf, &buf_len);
162*4882a593Smuzhiyun 		if (err && err != TPM_AUTHFAIL)
163*4882a593Smuzhiyun 			return -1;
164*4882a593Smuzhiyun 		if (err)
165*4882a593Smuzhiyun 			continue;
166*4882a593Smuzhiyun 		sha1_csum(buf, buf_len, digest);
167*4882a593Smuzhiyun 		if (!memcmp(digest, pubkey_digest, 20)) {
168*4882a593Smuzhiyun 			*handle = key_handles[i];
169*4882a593Smuzhiyun 			return 0;
170*4882a593Smuzhiyun 		}
171*4882a593Smuzhiyun 	}
172*4882a593Smuzhiyun 	return 1;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun /**
176*4882a593Smuzhiyun  * @brief read CCDM common data from TPM NV
177*4882a593Smuzhiyun  * @return 0 if CCDM common data was found and read, !=0 if something failed.
178*4882a593Smuzhiyun  */
read_common_data(void)179*4882a593Smuzhiyun static int read_common_data(void)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	uint32_t size = 0;
182*4882a593Smuzhiyun 	uint32_t err;
183*4882a593Smuzhiyun 	uint8_t buf[256];
184*4882a593Smuzhiyun 	sha1_context ctx;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	if (get_tpm_nv_size(NV_COMMON_DATA_INDEX, &size) ||
187*4882a593Smuzhiyun 	    size < NV_COMMON_DATA_MIN_SIZE)
188*4882a593Smuzhiyun 		return 1;
189*4882a593Smuzhiyun 	err = tpm_nv_read_value(NV_COMMON_DATA_INDEX,
190*4882a593Smuzhiyun 		buf, min(sizeof(buf), size));
191*4882a593Smuzhiyun 	if (err) {
192*4882a593Smuzhiyun 		printf("tpm_nv_read_value() failed: %u\n", err);
193*4882a593Smuzhiyun 		return 1;
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	device_id = get_unaligned_be64(buf);
197*4882a593Smuzhiyun 	device_cl = get_unaligned_be64(buf + 8);
198*4882a593Smuzhiyun 	device_type = get_unaligned_be64(buf + 16);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	sha1_starts(&ctx);
201*4882a593Smuzhiyun 	sha1_update(&ctx, buf, 24);
202*4882a593Smuzhiyun 	sha1_finish(&ctx, fix_hregs[FIX_HREG_DEVICE_ID_HASH].digest);
203*4882a593Smuzhiyun 	fix_hregs[FIX_HREG_DEVICE_ID_HASH].valid = true;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	platform_key_handle = get_unaligned_be32(buf + 24);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun /**
211*4882a593Smuzhiyun  * @brief get pointer to  hash register by specification
212*4882a593Smuzhiyun  * @param spec	specification of a hash register
213*4882a593Smuzhiyun  * @return pointer to hash register or NULL if @a spec does not qualify a
214*4882a593Smuzhiyun  * valid hash register; NULL else.
215*4882a593Smuzhiyun  */
get_hreg(uint8_t spec)216*4882a593Smuzhiyun static struct h_reg *get_hreg(uint8_t spec)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	uint8_t idx;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	idx = HREG_IDX(spec);
221*4882a593Smuzhiyun 	if (IS_FIX_HREG(spec)) {
222*4882a593Smuzhiyun 		if (idx < ARRAY_SIZE(fix_hregs))
223*4882a593Smuzhiyun 			return fix_hregs + idx;
224*4882a593Smuzhiyun 		hre_err = HRE_E_INVALID_HREG;
225*4882a593Smuzhiyun 	} else if (IS_PCR_HREG(spec)) {
226*4882a593Smuzhiyun 		if (idx < ARRAY_SIZE(pcr_hregs))
227*4882a593Smuzhiyun 			return pcr_hregs + idx;
228*4882a593Smuzhiyun 		hre_err = HRE_E_INVALID_HREG;
229*4882a593Smuzhiyun 	} else if (IS_VAR_HREG(spec)) {
230*4882a593Smuzhiyun 		if (idx < ARRAY_SIZE(var_hregs))
231*4882a593Smuzhiyun 			return var_hregs + idx;
232*4882a593Smuzhiyun 		hre_err = HRE_E_INVALID_HREG;
233*4882a593Smuzhiyun 	}
234*4882a593Smuzhiyun 	return NULL;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun /**
238*4882a593Smuzhiyun  * @brief get pointer of a hash register by specification and usage.
239*4882a593Smuzhiyun  * @param spec	specification of a hash register
240*4882a593Smuzhiyun  * @param mode	access mode (read or write or read/write)
241*4882a593Smuzhiyun  * @return pointer to hash register if found and valid; NULL else.
242*4882a593Smuzhiyun  *
243*4882a593Smuzhiyun  * This func uses @a get_reg() to determine the hash register for a given spec.
244*4882a593Smuzhiyun  * If a register is found it is validated according to the desired access mode.
245*4882a593Smuzhiyun  * The value of automatic registers (PCR register and fixed registers) is
246*4882a593Smuzhiyun  * loaded or computed on read access.
247*4882a593Smuzhiyun  */
access_hreg(uint8_t spec,enum access_mode mode)248*4882a593Smuzhiyun static struct h_reg *access_hreg(uint8_t spec, enum access_mode mode)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	struct h_reg *result;
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	result = get_hreg(spec);
253*4882a593Smuzhiyun 	if (!result)
254*4882a593Smuzhiyun 		return NULL;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if (mode & HREG_WR) {
257*4882a593Smuzhiyun 		if (IS_FIX_HREG(spec)) {
258*4882a593Smuzhiyun 			hre_err = HRE_E_INVALID_HREG;
259*4882a593Smuzhiyun 			return NULL;
260*4882a593Smuzhiyun 		}
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 	if (mode & HREG_RD) {
263*4882a593Smuzhiyun 		if (!result->valid) {
264*4882a593Smuzhiyun 			if (IS_PCR_HREG(spec)) {
265*4882a593Smuzhiyun 				hre_tpm_err = tpm_pcr_read(HREG_IDX(spec),
266*4882a593Smuzhiyun 					result->digest, 20);
267*4882a593Smuzhiyun 				result->valid = (hre_tpm_err == TPM_SUCCESS);
268*4882a593Smuzhiyun 			} else if (IS_FIX_HREG(spec)) {
269*4882a593Smuzhiyun 				switch (HREG_IDX(spec)) {
270*4882a593Smuzhiyun 				case FIX_HREG_DEVICE_ID_HASH:
271*4882a593Smuzhiyun 					read_common_data();
272*4882a593Smuzhiyun 					break;
273*4882a593Smuzhiyun 				case FIX_HREG_VENDOR:
274*4882a593Smuzhiyun 					memcpy(result->digest, vendor, 20);
275*4882a593Smuzhiyun 					result->valid = true;
276*4882a593Smuzhiyun 					break;
277*4882a593Smuzhiyun 				}
278*4882a593Smuzhiyun 			} else {
279*4882a593Smuzhiyun 				result->valid = true;
280*4882a593Smuzhiyun 			}
281*4882a593Smuzhiyun 		}
282*4882a593Smuzhiyun 		if (!result->valid) {
283*4882a593Smuzhiyun 			hre_err = HRE_E_INVALID_HREG;
284*4882a593Smuzhiyun 			return NULL;
285*4882a593Smuzhiyun 		}
286*4882a593Smuzhiyun 	}
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	return result;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
compute_and(void * _dst,const void * _src,size_t n)291*4882a593Smuzhiyun static void *compute_and(void *_dst, const void *_src, size_t n)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun 	uint8_t *dst = _dst;
294*4882a593Smuzhiyun 	const uint8_t *src = _src;
295*4882a593Smuzhiyun 	size_t i;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	for (i = n; i-- > 0; )
298*4882a593Smuzhiyun 		*dst++ &= *src++;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	return _dst;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun 
compute_or(void * _dst,const void * _src,size_t n)303*4882a593Smuzhiyun static void *compute_or(void *_dst, const void *_src, size_t n)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun 	uint8_t *dst = _dst;
306*4882a593Smuzhiyun 	const uint8_t *src = _src;
307*4882a593Smuzhiyun 	size_t i;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	for (i = n; i-- > 0; )
310*4882a593Smuzhiyun 		*dst++ |= *src++;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	return _dst;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
compute_xor(void * _dst,const void * _src,size_t n)315*4882a593Smuzhiyun static void *compute_xor(void *_dst, const void *_src, size_t n)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	uint8_t *dst = _dst;
318*4882a593Smuzhiyun 	const uint8_t *src = _src;
319*4882a593Smuzhiyun 	size_t i;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	for (i = n; i-- > 0; )
322*4882a593Smuzhiyun 		*dst++ ^= *src++;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	return _dst;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun 
compute_extend(void * _dst,const void * _src,size_t n)327*4882a593Smuzhiyun static void *compute_extend(void *_dst, const void *_src, size_t n)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun 	uint8_t digest[20];
330*4882a593Smuzhiyun 	sha1_context ctx;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	sha1_starts(&ctx);
333*4882a593Smuzhiyun 	sha1_update(&ctx, _dst, n);
334*4882a593Smuzhiyun 	sha1_update(&ctx, _src, n);
335*4882a593Smuzhiyun 	sha1_finish(&ctx, digest);
336*4882a593Smuzhiyun 	memcpy(_dst, digest, min(n, sizeof(digest)));
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	return _dst;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun 
hre_op_loadkey(struct h_reg * src_reg,struct h_reg * dst_reg,const void * key,size_t key_size)341*4882a593Smuzhiyun static int hre_op_loadkey(struct h_reg *src_reg, struct h_reg *dst_reg,
342*4882a593Smuzhiyun 		const void *key, size_t key_size)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun 	uint32_t parent_handle;
345*4882a593Smuzhiyun 	uint32_t key_handle;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	if (!src_reg || !dst_reg || !src_reg->valid || !dst_reg->valid)
348*4882a593Smuzhiyun 		return -1;
349*4882a593Smuzhiyun 	if (find_key(src_reg->digest, dst_reg->digest, &parent_handle))
350*4882a593Smuzhiyun 		return -1;
351*4882a593Smuzhiyun 	hre_tpm_err = tpm_load_key2_oiap(parent_handle, key, key_size,
352*4882a593Smuzhiyun 		src_reg->digest, &key_handle);
353*4882a593Smuzhiyun 	if (hre_tpm_err) {
354*4882a593Smuzhiyun 		hre_err = HRE_E_TPM_FAILURE;
355*4882a593Smuzhiyun 		return -1;
356*4882a593Smuzhiyun 	}
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun /**
362*4882a593Smuzhiyun  * @brief executes the next opcode on the hash register engine.
363*4882a593Smuzhiyun  * @param[in,out] ip	pointer to the opcode (instruction pointer)
364*4882a593Smuzhiyun  * @param[in,out] code_size	(remaining) size of the code
365*4882a593Smuzhiyun  * @return new instruction pointer on success, NULL on error.
366*4882a593Smuzhiyun  */
hre_execute_op(const uint8_t ** ip,size_t * code_size)367*4882a593Smuzhiyun static const uint8_t *hre_execute_op(const uint8_t **ip, size_t *code_size)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	bool dst_modified = false;
370*4882a593Smuzhiyun 	uint32_t ins;
371*4882a593Smuzhiyun 	uint8_t opcode;
372*4882a593Smuzhiyun 	uint8_t src_spec;
373*4882a593Smuzhiyun 	uint8_t dst_spec;
374*4882a593Smuzhiyun 	uint16_t data_size;
375*4882a593Smuzhiyun 	struct h_reg *src_reg, *dst_reg;
376*4882a593Smuzhiyun 	uint8_t buf[20];
377*4882a593Smuzhiyun 	const uint8_t *src_buf, *data;
378*4882a593Smuzhiyun 	uint8_t *ptr;
379*4882a593Smuzhiyun 	int i;
380*4882a593Smuzhiyun 	void * (*bin_func)(void *, const void *, size_t);
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	if (*code_size < 4)
383*4882a593Smuzhiyun 		return NULL;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	ins = get_unaligned_be32(*ip);
386*4882a593Smuzhiyun 	opcode = **ip;
387*4882a593Smuzhiyun 	data = *ip + 4;
388*4882a593Smuzhiyun 	src_spec = (ins >> 18) & 0x3f;
389*4882a593Smuzhiyun 	dst_spec = (ins >> 12) & 0x3f;
390*4882a593Smuzhiyun 	data_size = (ins & 0x7ff);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	debug("HRE: ins=%08x (op=%02x, s=%02x, d=%02x, L=%d)\n", ins,
393*4882a593Smuzhiyun 	      opcode, src_spec, dst_spec, data_size);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	if ((opcode & 0x80) && (data_size + 4) > *code_size)
396*4882a593Smuzhiyun 		return NULL;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	src_reg = access_hreg(src_spec, HREG_RD);
399*4882a593Smuzhiyun 	if (hre_err || hre_tpm_err)
400*4882a593Smuzhiyun 		return NULL;
401*4882a593Smuzhiyun 	dst_reg = access_hreg(dst_spec, (opcode & 0x40) ? HREG_RDWR : HREG_WR);
402*4882a593Smuzhiyun 	if (hre_err || hre_tpm_err)
403*4882a593Smuzhiyun 		return NULL;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	switch (opcode) {
406*4882a593Smuzhiyun 	case HRE_NOP:
407*4882a593Smuzhiyun 		goto end;
408*4882a593Smuzhiyun 	case HRE_CHECK0:
409*4882a593Smuzhiyun 		if (src_reg) {
410*4882a593Smuzhiyun 			for (i = 0; i < 20; ++i) {
411*4882a593Smuzhiyun 				if (src_reg->digest[i])
412*4882a593Smuzhiyun 					return NULL;
413*4882a593Smuzhiyun 			}
414*4882a593Smuzhiyun 		}
415*4882a593Smuzhiyun 		break;
416*4882a593Smuzhiyun 	case HRE_LOAD:
417*4882a593Smuzhiyun 		bin_func = memcpy;
418*4882a593Smuzhiyun 		goto do_bin_func;
419*4882a593Smuzhiyun 	case HRE_XOR:
420*4882a593Smuzhiyun 		bin_func = compute_xor;
421*4882a593Smuzhiyun 		goto do_bin_func;
422*4882a593Smuzhiyun 	case HRE_AND:
423*4882a593Smuzhiyun 		bin_func = compute_and;
424*4882a593Smuzhiyun 		goto do_bin_func;
425*4882a593Smuzhiyun 	case HRE_OR:
426*4882a593Smuzhiyun 		bin_func = compute_or;
427*4882a593Smuzhiyun 		goto do_bin_func;
428*4882a593Smuzhiyun 	case HRE_EXTEND:
429*4882a593Smuzhiyun 		bin_func = compute_extend;
430*4882a593Smuzhiyun do_bin_func:
431*4882a593Smuzhiyun 		if (!dst_reg)
432*4882a593Smuzhiyun 			return NULL;
433*4882a593Smuzhiyun 		if (src_reg) {
434*4882a593Smuzhiyun 			src_buf = src_reg->digest;
435*4882a593Smuzhiyun 		} else {
436*4882a593Smuzhiyun 			if (!data_size) {
437*4882a593Smuzhiyun 				memset(buf, 0, 20);
438*4882a593Smuzhiyun 				src_buf = buf;
439*4882a593Smuzhiyun 			} else if (data_size == 1) {
440*4882a593Smuzhiyun 				memset(buf, *data, 20);
441*4882a593Smuzhiyun 				src_buf = buf;
442*4882a593Smuzhiyun 			} else if (data_size >= 20) {
443*4882a593Smuzhiyun 				src_buf = data;
444*4882a593Smuzhiyun 			} else {
445*4882a593Smuzhiyun 				src_buf = buf;
446*4882a593Smuzhiyun 				for (ptr = (uint8_t *)src_buf, i = 20; i > 0;
447*4882a593Smuzhiyun 					i -= data_size, ptr += data_size)
448*4882a593Smuzhiyun 					memcpy(ptr, data,
449*4882a593Smuzhiyun 					       min_t(size_t, i, data_size));
450*4882a593Smuzhiyun 			}
451*4882a593Smuzhiyun 		}
452*4882a593Smuzhiyun 		bin_func(dst_reg->digest, src_buf, 20);
453*4882a593Smuzhiyun 		dst_reg->valid = true;
454*4882a593Smuzhiyun 		dst_modified = true;
455*4882a593Smuzhiyun 		break;
456*4882a593Smuzhiyun 	case HRE_LOADKEY:
457*4882a593Smuzhiyun 		if (hre_op_loadkey(src_reg, dst_reg, data, data_size))
458*4882a593Smuzhiyun 			return NULL;
459*4882a593Smuzhiyun 		break;
460*4882a593Smuzhiyun 	default:
461*4882a593Smuzhiyun 		return NULL;
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	if (dst_reg && dst_modified && IS_PCR_HREG(dst_spec)) {
465*4882a593Smuzhiyun 		hre_tpm_err = tpm_extend(HREG_IDX(dst_spec), dst_reg->digest,
466*4882a593Smuzhiyun 			dst_reg->digest);
467*4882a593Smuzhiyun 		if (hre_tpm_err) {
468*4882a593Smuzhiyun 			hre_err = HRE_E_TPM_FAILURE;
469*4882a593Smuzhiyun 			return NULL;
470*4882a593Smuzhiyun 		}
471*4882a593Smuzhiyun 	}
472*4882a593Smuzhiyun end:
473*4882a593Smuzhiyun 	*ip += 4;
474*4882a593Smuzhiyun 	*code_size -= 4;
475*4882a593Smuzhiyun 	if (opcode & 0x80) {
476*4882a593Smuzhiyun 		*ip += data_size;
477*4882a593Smuzhiyun 		*code_size -= data_size;
478*4882a593Smuzhiyun 	}
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	return *ip;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun /**
484*4882a593Smuzhiyun  * @brief runs a program on the hash register engine.
485*4882a593Smuzhiyun  * @param code		pointer to the (HRE) code.
486*4882a593Smuzhiyun  * @param code_size	size of the code (in bytes).
487*4882a593Smuzhiyun  * @return 0 on success, != 0 on failure.
488*4882a593Smuzhiyun  */
hre_run_program(const uint8_t * code,size_t code_size)489*4882a593Smuzhiyun int hre_run_program(const uint8_t *code, size_t code_size)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun 	size_t code_left;
492*4882a593Smuzhiyun 	const uint8_t *ip = code;
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	code_left = code_size;
495*4882a593Smuzhiyun 	hre_tpm_err = 0;
496*4882a593Smuzhiyun 	hre_err = HRE_E_OK;
497*4882a593Smuzhiyun 	while (code_left > 0)
498*4882a593Smuzhiyun 		if (!hre_execute_op(&ip, &code_left))
499*4882a593Smuzhiyun 			return -1;
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	return hre_err;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun 
hre_verify_program(struct key_program * prg)504*4882a593Smuzhiyun int hre_verify_program(struct key_program *prg)
505*4882a593Smuzhiyun {
506*4882a593Smuzhiyun 	uint32_t crc;
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	crc = crc32(0, prg->code, prg->code_size);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	if (crc != prg->code_crc) {
511*4882a593Smuzhiyun 		printf("HRC crc mismatch: %08x != %08x\n",
512*4882a593Smuzhiyun 		       crc, prg->code_crc);
513*4882a593Smuzhiyun 		return 1;
514*4882a593Smuzhiyun 	}
515*4882a593Smuzhiyun 	return 0;
516*4882a593Smuzhiyun }
517