1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) 2013 Gateworks Corporation 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Author: Tim Harvey <tharvey@gateworks.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef _GWVENTANA_COMMON_H_ 10*4882a593Smuzhiyun #define _GWVENTANA_COMMON_H_ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include "ventana_eeprom.h" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* GPIO's common to all baseboards */ 15*4882a593Smuzhiyun #define GP_PHY_RST IMX_GPIO_NR(1, 30) 16*4882a593Smuzhiyun #define GP_RS232_EN IMX_GPIO_NR(2, 11) 17*4882a593Smuzhiyun #define GP_MSATA_SEL IMX_GPIO_NR(2, 8) 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 20*4882a593Smuzhiyun PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 21*4882a593Smuzhiyun PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 24*4882a593Smuzhiyun PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ 25*4882a593Smuzhiyun PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 28*4882a593Smuzhiyun PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 29*4882a593Smuzhiyun PAD_CTL_DSE_40ohm | PAD_CTL_HYS) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define SPI_PAD_CTRL (PAD_CTL_HYS | \ 32*4882a593Smuzhiyun PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ 33*4882a593Smuzhiyun PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ 36*4882a593Smuzhiyun PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ 37*4882a593Smuzhiyun PAD_CTL_ODE | PAD_CTL_SRE_FAST) 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 40*4882a593Smuzhiyun PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 41*4882a593Smuzhiyun PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST) 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #define DIO_PAD_CFG (MUX_PAD_CTRL(IRQ_PAD_CTRL) | MUX_MODE_SION) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* 48*4882a593Smuzhiyun * each baseboard has an optional set user configurable Digital IO lines which 49*4882a593Smuzhiyun * can be pinmuxed as a GPIO or in some cases a PWM 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun struct dio_cfg { 52*4882a593Smuzhiyun iomux_v3_cfg_t gpio_padmux[2]; 53*4882a593Smuzhiyun unsigned gpio_param; 54*4882a593Smuzhiyun iomux_v3_cfg_t pwm_padmux[2]; 55*4882a593Smuzhiyun unsigned pwm_param; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct ventana { 59*4882a593Smuzhiyun /* pinmux */ 60*4882a593Smuzhiyun iomux_v3_cfg_t const *gpio_pads; 61*4882a593Smuzhiyun int num_pads; 62*4882a593Smuzhiyun /* DIO pinmux/val */ 63*4882a593Smuzhiyun struct dio_cfg *dio_cfg; 64*4882a593Smuzhiyun int dio_num; 65*4882a593Smuzhiyun /* various gpios (0 if non-existent) */ 66*4882a593Smuzhiyun int leds[3]; 67*4882a593Smuzhiyun int pcie_rst; 68*4882a593Smuzhiyun int mezz_pwren; 69*4882a593Smuzhiyun int mezz_irq; 70*4882a593Smuzhiyun int rs485en; 71*4882a593Smuzhiyun int gps_shdn; 72*4882a593Smuzhiyun int vidin_en; 73*4882a593Smuzhiyun int dioi2c_en; 74*4882a593Smuzhiyun int pcie_sson; 75*4882a593Smuzhiyun int usb_sel; 76*4882a593Smuzhiyun int wdis; 77*4882a593Smuzhiyun int msata_en; 78*4882a593Smuzhiyun int rs232_en; 79*4882a593Smuzhiyun int otgpwr_en; 80*4882a593Smuzhiyun int vsel_pin; 81*4882a593Smuzhiyun int mmc_cd; 82*4882a593Smuzhiyun /* various features */ 83*4882a593Smuzhiyun bool usd_vsel; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun extern struct ventana gpio_cfg[GW_UNKNOWN]; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* configure i2c iomux */ 89*4882a593Smuzhiyun void setup_ventana_i2c(void); 90*4882a593Smuzhiyun /* configure uart iomux */ 91*4882a593Smuzhiyun void setup_iomux_uart(void); 92*4882a593Smuzhiyun /* conifgure PMIC */ 93*4882a593Smuzhiyun void setup_pmic(void); 94*4882a593Smuzhiyun /* configure gpio iomux/defaults */ 95*4882a593Smuzhiyun void setup_iomux_gpio(int board, struct ventana_board_info *); 96*4882a593Smuzhiyun /* late setup of GPIO (configuration per baseboard and env) */ 97*4882a593Smuzhiyun void setup_board_gpio(int board, struct ventana_board_info *); 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #endif /* #ifndef _GWVENTANA_COMMON_H_ */ 100