1*4882a593SmuzhiyunOverview 2*4882a593Smuzhiyun========= 3*4882a593SmuzhiyunThe P2041 Processor combines four Power Architecture processor cores 4*4882a593Smuzhiyunwith high-performance datapath acceleration architecture(DPAA), CoreNet 5*4882a593Smuzhiyunfabric infrastructure, as well as network and peripheral bus interfaces 6*4882a593Smuzhiyunrequired for networking, telecom/datacom, wireless infrastructure, and 7*4882a593Smuzhiyunmilitary/aerospace applications. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunP2041RDB board is a quad core platform supporting the P2041 processor 10*4882a593Smuzhiyunof QorIQ DPAA series. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunBoot from NOR flash 13*4882a593Smuzhiyun=================== 14*4882a593Smuzhiyun1. Build image 15*4882a593Smuzhiyun make P2041RDB_config 16*4882a593Smuzhiyun make all 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun2. Program image 19*4882a593Smuzhiyun => tftp 1000000 u-boot.bin 20*4882a593Smuzhiyun => protect off all 21*4882a593Smuzhiyun => erase eff40000 efffffff 22*4882a593Smuzhiyun => cp.b 1000000 eff40000 c0000 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun3. Program RCW 25*4882a593Smuzhiyun => tftp 1000000 rcw.bin 26*4882a593Smuzhiyun => protect off all 27*4882a593Smuzhiyun => erase e8000000 e801ffff 28*4882a593Smuzhiyun => cp.b 1000000 e8000000 50 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun4. Program FMAN Firmware ucode 31*4882a593Smuzhiyun => tftp 1000000 ucode.bin 32*4882a593Smuzhiyun => protect off all 33*4882a593Smuzhiyun => erase eff00000 eff3ffff 34*4882a593Smuzhiyun => cp.b 1000000 eff00000 2000 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun5. Change DIP-switch 37*4882a593Smuzhiyun SW1[1-5] = 10110 38*4882a593Smuzhiyun Note: 1 stands for 'on', 0 stands for 'off' 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunBoot from SDCard 41*4882a593Smuzhiyun=================== 42*4882a593Smuzhiyun1. Build image 43*4882a593Smuzhiyun make P2041RDB_SDCARD_config 44*4882a593Smuzhiyun make all 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun2. Generate PBL imge 47*4882a593Smuzhiyun Use PE tool to produce a image used to be programed to 48*4882a593Smuzhiyun SDCard which contains RCW and U-Boot image. 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun3. Program the PBL image to SDCard 51*4882a593Smuzhiyun => tftp 1000000 pbl_sd.bin 52*4882a593Smuzhiyun => mmcinfo 53*4882a593Smuzhiyun => mmc write 1000000 8 672 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun4. Program FMAN Firmware ucode 56*4882a593Smuzhiyun => tftp 1000000 ucode.bin 57*4882a593Smuzhiyun => mmc write 1000000 690 10 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun5. Change DIP-switch 60*4882a593Smuzhiyun SW1[1-5] = 01100 61*4882a593Smuzhiyun Note: 1 stands for 'on', 0 stands for 'off' 62*4882a593Smuzhiyun 63*4882a593SmuzhiyunBoot from SPI flash 64*4882a593Smuzhiyun=================== 65*4882a593Smuzhiyun1. Build image 66*4882a593Smuzhiyun make P2041RDB_SPIFLASH_config 67*4882a593Smuzhiyun make all 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun2. Generate PBL imge 70*4882a593Smuzhiyun Use PE tool to produce a image used to be programed to 71*4882a593Smuzhiyun SPI flash which contains RCW and U-Boot image. 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun3. Program the PBL image to SPI flash 74*4882a593Smuzhiyun => tftp 1000000 pbl_spi.bin 75*4882a593Smuzhiyun => spi probe 0 76*4882a593Smuzhiyun => sf erase 0 100000 77*4882a593Smuzhiyun => sf write 1000000 0 $filesize 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun4. Program FMAN Firmware ucode 80*4882a593Smuzhiyun => tftp 1000000 ucode.bin 81*4882a593Smuzhiyun => sf erase 110000 10000 82*4882a593Smuzhiyun => sf write 1000000 110000 $filesize 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun5. Change DIP-switch 85*4882a593Smuzhiyun SW1[1-5] = 10100 86*4882a593Smuzhiyun Note: 1 stands for 'on', 0 stands for 'off' 87*4882a593Smuzhiyun 88*4882a593SmuzhiyunCPLD command 89*4882a593Smuzhiyun============ 90*4882a593SmuzhiyunThe CPLD is used to control the power sequence and some serdes lane 91*4882a593Smuzhiyunmux function. 92*4882a593Smuzhiyun 93*4882a593Smuzhiyuncpld reset - hard reset to default bank 94*4882a593Smuzhiyuncpld reset altbank - reset to alternate bank 95*4882a593Smuzhiyuncpld lane_mux <lane> <mux_value> - set multiplexed lane pin 96*4882a593Smuzhiyun lane 6: 0 -> slot1 (Default) 97*4882a593Smuzhiyun 1 -> SGMII 98*4882a593Smuzhiyun lane a: 0 -> slot2 (Default) 99*4882a593Smuzhiyun 1 -> AURORA 100*4882a593Smuzhiyun lane c: 0 -> slot2 (Default) 101*4882a593Smuzhiyun 1 -> SATA0 102*4882a593Smuzhiyun lane d: 0 -> slot2 (Default) 103*4882a593Smuzhiyun 1 -> SATA1 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunUsing the Device Tree Source File 106*4882a593Smuzhiyun================================= 107*4882a593SmuzhiyunTo create the DTB (Device Tree Binary) image file, use a command 108*4882a593Smuzhiyunsimilar to this: 109*4882a593Smuzhiyun dtc -O dtb -b 0 -p 1024 p2041rdb.dts > p2041rdb.dtb 110*4882a593Smuzhiyun 111*4882a593SmuzhiyunOr use the following command: 112*4882a593Smuzhiyun {linux-2.6}/make p2041rdb.dtb ARCH=powerpc 113*4882a593Smuzhiyun 114*4882a593Smuzhiyunthen the dtb file will be generated under the following directory: 115*4882a593Smuzhiyun {linux-2.6}/arch/powerpc/boot/p2041rdb.dtb 116*4882a593Smuzhiyun 117*4882a593SmuzhiyunBooting Linux 118*4882a593Smuzhiyun============= 119*4882a593SmuzhiyunPlace a linux uImage in the TFTP disk area. 120*4882a593Smuzhiyun tftp 1000000 uImage 121*4882a593Smuzhiyun tftp 2000000 rootfs.ext2.gz.uboot 122*4882a593Smuzhiyun tftp 3000000 p2041rdb.dtb 123*4882a593Smuzhiyun bootm 1000000 2000000 3000000 124