1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2016 Freescale Semiconductor, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <config.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun.macro imx7ulp_ddr_freq_decrease 10*4882a593Smuzhiyun ldr r2, =0x403f0000 11*4882a593Smuzhiyun ldr r3, =0x00000000 12*4882a593Smuzhiyun str r3, [r2, #0xdc] 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun ldr r2, =0x403e0000 15*4882a593Smuzhiyun ldr r3, =0x01000020 16*4882a593Smuzhiyun str r3, [r2, #0x40] 17*4882a593Smuzhiyun ldr r3, =0x01000000 18*4882a593Smuzhiyun str r3, [r2, #0x500] 19*4882a593Smuzhiyun ldr r3, =0x80808080 20*4882a593Smuzhiyun str r3, [r2, #0x50c] 21*4882a593Smuzhiyun ldr r3, =0x00140000 22*4882a593Smuzhiyun str r3, [r2, #0x508] 23*4882a593Smuzhiyun ldr r3, =0x00000004 24*4882a593Smuzhiyun str r3, [r2, #0x510] 25*4882a593Smuzhiyun ldr r3, =0x00000002 26*4882a593Smuzhiyun str r3, [r2, #0x514] 27*4882a593Smuzhiyun ldr r3, =0x00000001 28*4882a593Smuzhiyun str r3, [r2, #0x500] 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun ldr r3, =0x01000000 31*4882a593Smuzhiyunwait1: 32*4882a593Smuzhiyun ldr r4, [r2, #0x500] 33*4882a593Smuzhiyun and r4, r3 34*4882a593Smuzhiyun cmp r4, r3 35*4882a593Smuzhiyun bne wait1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun ldr r3, =0x8080801E 38*4882a593Smuzhiyun str r3, [r2, #0x50c] 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun ldr r3, =0x00000040 41*4882a593Smuzhiyunwait2: 42*4882a593Smuzhiyun ldr r4, [r2, #0x50c] 43*4882a593Smuzhiyun and r4, r3 44*4882a593Smuzhiyun cmp r4, r3 45*4882a593Smuzhiyun bne wait2 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun ldr r3, =0x00000001 48*4882a593Smuzhiyun str r3, [r2, #0x30] 49*4882a593Smuzhiyun ldr r3, =0x11000020 50*4882a593Smuzhiyun str r3, [r2, #0x40] 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun ldr r2, =0x403f0000 53*4882a593Smuzhiyun ldr r3, =0x42000000 54*4882a593Smuzhiyun str r3, [r2, #0xdc] 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun.endm 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun.macro imx7ulp_evk_ddr_setting 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun imx7ulp_ddr_freq_decrease 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* Enable MMDC PCC clock */ 63*4882a593Smuzhiyun ldr r2, =0x40b30000 64*4882a593Smuzhiyun ldr r3, =0x40000000 65*4882a593Smuzhiyun str r3, [r2, #0xac] 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* Configure DDR pad */ 68*4882a593Smuzhiyun ldr r0, =0x40ad0000 69*4882a593Smuzhiyun ldr r1, =0x00040000 70*4882a593Smuzhiyun str r1, [r0, #0x128] 71*4882a593Smuzhiyun ldr r1, =0x0 72*4882a593Smuzhiyun str r1, [r0, #0xf8] 73*4882a593Smuzhiyun ldr r1, =0x00000180 74*4882a593Smuzhiyun str r1, [r0, #0xd8] 75*4882a593Smuzhiyun ldr r1, =0x00000180 76*4882a593Smuzhiyun str r1, [r0, #0x108] 77*4882a593Smuzhiyun ldr r1, =0x00000180 78*4882a593Smuzhiyun str r1, [r0, #0x104] 79*4882a593Smuzhiyun ldr r1, =0x00010000 80*4882a593Smuzhiyun str r1, [r0, #0x124] 81*4882a593Smuzhiyun ldr r1, =0x0000018C 82*4882a593Smuzhiyun str r1, [r0, #0x80] 83*4882a593Smuzhiyun ldr r1, =0x0000018C 84*4882a593Smuzhiyun str r1, [r0, #0x84] 85*4882a593Smuzhiyun ldr r1, =0x0000018C 86*4882a593Smuzhiyun str r1, [r0, #0x88] 87*4882a593Smuzhiyun ldr r1, =0x0000018C 88*4882a593Smuzhiyun str r1, [r0, #0x8c] 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun ldr r1, =0x00010000 91*4882a593Smuzhiyun str r1, [r0, #0x120] 92*4882a593Smuzhiyun ldr r1, =0x00000180 93*4882a593Smuzhiyun str r1, [r0, #0x10c] 94*4882a593Smuzhiyun ldr r1, =0x00000180 95*4882a593Smuzhiyun str r1, [r0, #0x110] 96*4882a593Smuzhiyun ldr r1, =0x00000180 97*4882a593Smuzhiyun str r1, [r0, #0x114] 98*4882a593Smuzhiyun ldr r1, =0x00000180 99*4882a593Smuzhiyun str r1, [r0, #0x118] 100*4882a593Smuzhiyun ldr r1, =0x00000180 101*4882a593Smuzhiyun str r1, [r0, #0x90] 102*4882a593Smuzhiyun ldr r1, =0x00000180 103*4882a593Smuzhiyun str r1, [r0, #0x94] 104*4882a593Smuzhiyun ldr r1, =0x00000180 105*4882a593Smuzhiyun str r1, [r0, #0x98] 106*4882a593Smuzhiyun ldr r1, =0x00000180 107*4882a593Smuzhiyun str r1, [r0, #0x9c] 108*4882a593Smuzhiyun ldr r1, =0x00040000 109*4882a593Smuzhiyun str r1, [r0, #0xe0] 110*4882a593Smuzhiyun ldr r1, =0x00040000 111*4882a593Smuzhiyun str r1, [r0, #0xe4] 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun ldr r0, =0x40ab0000 114*4882a593Smuzhiyun ldr r1, =0x00008000 115*4882a593Smuzhiyun str r1, [r0, #0x1c] 116*4882a593Smuzhiyun ldr r1, =0xA1390003 117*4882a593Smuzhiyun str r1, [r0, #0x800] 118*4882a593Smuzhiyun ldr r1, =0x0D3900A0 119*4882a593Smuzhiyun str r1, [r0, #0x85c] 120*4882a593Smuzhiyun ldr r1, =0x00400000 121*4882a593Smuzhiyun str r1, [r0, #0x890] 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun ldr r1, =0x40404040 124*4882a593Smuzhiyun str r1, [r0, #0x848] 125*4882a593Smuzhiyun ldr r1, =0x40404040 126*4882a593Smuzhiyun str r1, [r0, #0x850] 127*4882a593Smuzhiyun ldr r1, =0x33333333 128*4882a593Smuzhiyun str r1, [r0, #0x81c] 129*4882a593Smuzhiyun ldr r1, =0x33333333 130*4882a593Smuzhiyun str r1, [r0, #0x820] 131*4882a593Smuzhiyun ldr r1, =0x33333333 132*4882a593Smuzhiyun str r1, [r0, #0x824] 133*4882a593Smuzhiyun ldr r1, =0x33333333 134*4882a593Smuzhiyun str r1, [r0, #0x828] 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun ldr r1, =0xf3333333 137*4882a593Smuzhiyun str r1, [r0, #0x82c] 138*4882a593Smuzhiyun ldr r1, =0xf3333333 139*4882a593Smuzhiyun str r1, [r0, #0x830] 140*4882a593Smuzhiyun ldr r1, =0xf3333333 141*4882a593Smuzhiyun str r1, [r0, #0x834] 142*4882a593Smuzhiyun ldr r1, =0xf3333333 143*4882a593Smuzhiyun str r1, [r0, #0x838] 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun ldr r1, =0x24922492 146*4882a593Smuzhiyun str r1, [r0, #0x8c0] 147*4882a593Smuzhiyun ldr r1, =0x00000800 148*4882a593Smuzhiyun str r1, [r0, #0x8b8] 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun ldr r1, =0x00020052 151*4882a593Smuzhiyun str r1, [r0, #0x4] 152*4882a593Smuzhiyun ldr r1, =0x292C42F3 153*4882a593Smuzhiyun str r1, [r0, #0xc] 154*4882a593Smuzhiyun ldr r1, =0x00100A22 155*4882a593Smuzhiyun str r1, [r0, #0x10] 156*4882a593Smuzhiyun ldr r1, =0x00120556 157*4882a593Smuzhiyun str r1, [r0, #0x38] 158*4882a593Smuzhiyun ldr r1, =0x00C700DB 159*4882a593Smuzhiyun str r1, [r0, #0x14] 160*4882a593Smuzhiyun ldr r1, =0x00211718 161*4882a593Smuzhiyun str r1, [r0, #0x18] 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun ldr r1, =0x0F9F26D2 164*4882a593Smuzhiyun str r1, [r0, #0x2c] 165*4882a593Smuzhiyun ldr r1, =0x009F0E10 166*4882a593Smuzhiyun str r1, [r0, #0x30] 167*4882a593Smuzhiyun ldr r1, =0x0000003F 168*4882a593Smuzhiyun str r1, [r0, #0x40] 169*4882a593Smuzhiyun ldr r1, =0xC3190000 170*4882a593Smuzhiyun str r1, [r0, #0x0] 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun ldr r1, =0x00008050 173*4882a593Smuzhiyun str r1, [r0, #0x1c] 174*4882a593Smuzhiyun ldr r1, =0x00008058 175*4882a593Smuzhiyun str r1, [r0, #0x1c] 176*4882a593Smuzhiyun ldr r1, =0x003F8030 177*4882a593Smuzhiyun str r1, [r0, #0x1c] 178*4882a593Smuzhiyun ldr r1, =0x003F8038 179*4882a593Smuzhiyun str r1, [r0, #0x1c] 180*4882a593Smuzhiyun ldr r1, =0xFF0A8030 181*4882a593Smuzhiyun str r1, [r0, #0x1c] 182*4882a593Smuzhiyun ldr r1, =0xFF0A8038 183*4882a593Smuzhiyun str r1, [r0, #0x1c] 184*4882a593Smuzhiyun ldr r1, =0x04028030 185*4882a593Smuzhiyun str r1, [r0, #0x1c] 186*4882a593Smuzhiyun ldr r1, =0x04028038 187*4882a593Smuzhiyun str r1, [r0, #0x1c] 188*4882a593Smuzhiyun ldr r1, =0x83018030 189*4882a593Smuzhiyun str r1, [r0, #0x1c] 190*4882a593Smuzhiyun ldr r1, =0x83018038 191*4882a593Smuzhiyun str r1, [r0, #0x1c] 192*4882a593Smuzhiyun ldr r1, =0x01038030 193*4882a593Smuzhiyun str r1, [r0, #0x1c] 194*4882a593Smuzhiyun ldr r1, =0x01038038 195*4882a593Smuzhiyun str r1, [r0, #0x1c] 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun ldr r1, =0x20000000 198*4882a593Smuzhiyun str r1, [r0, #0x83c] 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun ldr r1, =0x00001800 201*4882a593Smuzhiyun str r1, [r0, #0x20] 202*4882a593Smuzhiyun ldr r1, =0xA1310000 203*4882a593Smuzhiyun str r1, [r0, #0x800] 204*4882a593Smuzhiyun ldr r1, =0x00020052 205*4882a593Smuzhiyun str r1, [r0, #0x4] 206*4882a593Smuzhiyun ldr r1, =0x00011006 207*4882a593Smuzhiyun str r1, [r0, #0x404] 208*4882a593Smuzhiyun ldr r1, =0x00000000 209*4882a593Smuzhiyun str r1, [r0, #0x1c] 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun.endm 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun.macro imx7ulp_clock_gating 214*4882a593Smuzhiyun.endm 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun.macro imx7ulp_qos_setting 217*4882a593Smuzhiyun.endm 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun.macro imx7ulp_ddr_setting 220*4882a593Smuzhiyun imx7ulp_evk_ddr_setting 221*4882a593Smuzhiyun.endm 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun/* include the common plugin code here */ 224*4882a593Smuzhiyun#include <asm/arch/mx7ulp_plugin.S> 225