1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <netdev.h>
13*4882a593Smuzhiyun #include <asm/arch/clock.h>
14*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
15*4882a593Smuzhiyun #include <asm/arch/sys_proto.h>
16*4882a593Smuzhiyun #include <watchdog.h>
17*4882a593Smuzhiyun #include <power/pmic.h>
18*4882a593Smuzhiyun #include <fsl_pmic.h>
19*4882a593Smuzhiyun #include <errno.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #ifdef CONFIG_SPL_BUILD
board_init_f(ulong bootflag)24*4882a593Smuzhiyun void board_init_f(ulong bootflag)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun * copy ourselves from where we are running to where we were
28*4882a593Smuzhiyun * linked at. Use ulong pointers as all addresses involved
29*4882a593Smuzhiyun * are 4-byte-aligned.
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun ulong *start_ptr, *end_ptr, *link_ptr, *run_ptr, *dst;
32*4882a593Smuzhiyun asm volatile ("ldr %0, =_start" : "=r"(start_ptr));
33*4882a593Smuzhiyun asm volatile ("ldr %0, =_end" : "=r"(end_ptr));
34*4882a593Smuzhiyun asm volatile ("ldr %0, =board_init_f" : "=r"(link_ptr));
35*4882a593Smuzhiyun asm volatile ("adr %0, board_init_f" : "=r"(run_ptr));
36*4882a593Smuzhiyun for (dst = start_ptr; dst < end_ptr; dst++)
37*4882a593Smuzhiyun *dst = *(dst+(run_ptr-link_ptr));
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * branch to nand_boot's link-time address.
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun asm volatile("ldr pc, =nand_boot");
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun #endif
44*4882a593Smuzhiyun
dram_init(void)45*4882a593Smuzhiyun int dram_init(void)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun /* dram_init must store complete ramsize in gd->ram_size */
48*4882a593Smuzhiyun gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
49*4882a593Smuzhiyun PHYS_SDRAM_1_SIZE);
50*4882a593Smuzhiyun return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
board_early_init_f(void)53*4882a593Smuzhiyun int board_early_init_f(void)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun /* CS5: CPLD incl. network controller */
56*4882a593Smuzhiyun static const struct mxc_weimcs cs5 = {
57*4882a593Smuzhiyun /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
58*4882a593Smuzhiyun CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3),
59*4882a593Smuzhiyun /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
60*4882a593Smuzhiyun CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1),
61*4882a593Smuzhiyun /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
62*4882a593Smuzhiyun CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0)
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun mxc_setup_weimcs(5, &cs5);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Setup UART1 and SPI2 pins */
68*4882a593Smuzhiyun mx31_uart1_hw_init();
69*4882a593Smuzhiyun mx31_spi2_hw_init();
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return 0;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
board_init(void)74*4882a593Smuzhiyun int board_init(void)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun /* adress of boot parameters */
77*4882a593Smuzhiyun gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun return 0;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
board_late_init(void)82*4882a593Smuzhiyun int board_late_init(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun u32 val;
85*4882a593Smuzhiyun struct pmic *p;
86*4882a593Smuzhiyun int ret;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun ret = pmic_init(CONFIG_FSL_PMIC_BUS);
89*4882a593Smuzhiyun if (ret)
90*4882a593Smuzhiyun return ret;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun p = pmic_get("FSL_PMIC");
93*4882a593Smuzhiyun if (!p)
94*4882a593Smuzhiyun return -ENODEV;
95*4882a593Smuzhiyun /* Enable RTC battery */
96*4882a593Smuzhiyun pmic_reg_read(p, REG_POWER_CTL0, &val);
97*4882a593Smuzhiyun pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
98*4882a593Smuzhiyun pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
99*4882a593Smuzhiyun #ifdef CONFIG_HW_WATCHDOG
100*4882a593Smuzhiyun hw_watchdog_init();
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
checkboard(void)105*4882a593Smuzhiyun int checkboard(void)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun printf("Board: MX31PDK\n");
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
board_eth_init(bd_t * bis)111*4882a593Smuzhiyun int board_eth_init(bd_t *bis)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun int rc = 0;
114*4882a593Smuzhiyun #ifdef CONFIG_SMC911X
115*4882a593Smuzhiyun rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
116*4882a593Smuzhiyun #endif
117*4882a593Smuzhiyun return rc;
118*4882a593Smuzhiyun }
119