1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * January 2004 - Changed to support H4 device 3*4882a593Smuzhiyun * Copyright (c) 2004 Texas Instruments 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2002 6*4882a593Smuzhiyun * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") 12*4882a593SmuzhiyunOUTPUT_ARCH(arm) 13*4882a593SmuzhiyunENTRY(_start) 14*4882a593SmuzhiyunSECTIONS 15*4882a593Smuzhiyun{ 16*4882a593Smuzhiyun . = 0x00000000; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun . = ALIGN(4); 19*4882a593Smuzhiyun .text : 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun *(.__image_copy_start) 22*4882a593Smuzhiyun /* WARNING - the following is hand-optimized to fit within */ 23*4882a593Smuzhiyun /* the sector layout of our flash chips! XXX FIXME XXX */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun * (.vectors) 26*4882a593Smuzhiyun arch/arm/cpu/arm1136/start.o (.text*) 27*4882a593Smuzhiyun board/freescale/mx31ads/built-in.o (.text*) 28*4882a593Smuzhiyun arch/arm/lib/built-in.o (.text*) 29*4882a593Smuzhiyun net/built-in.o (.text*) 30*4882a593Smuzhiyun drivers/mtd/built-in.o (.text*) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun . = DEFINED(env_offset) ? env_offset : .; 33*4882a593Smuzhiyun env/embedded.o(.text*) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun *(.text*) 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun . = ALIGN(4); 38*4882a593Smuzhiyun .rodata : { *(.rodata*) } 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun . = ALIGN(4); 41*4882a593Smuzhiyun .data : { 42*4882a593Smuzhiyun *(.data*) 43*4882a593Smuzhiyun } 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun . = ALIGN(4); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun . = ALIGN(4); 48*4882a593Smuzhiyun .u_boot_list : { 49*4882a593Smuzhiyun KEEP(*(SORT(.u_boot_list*))); 50*4882a593Smuzhiyun } 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun . = ALIGN(4); 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun .image_copy_end : 55*4882a593Smuzhiyun { 56*4882a593Smuzhiyun *(.__image_copy_end) 57*4882a593Smuzhiyun } 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun .rel_dyn_start : 60*4882a593Smuzhiyun { 61*4882a593Smuzhiyun *(.__rel_dyn_start) 62*4882a593Smuzhiyun } 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun .rel.dyn : { 65*4882a593Smuzhiyun *(.rel*) 66*4882a593Smuzhiyun } 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun .rel_dyn_end : 69*4882a593Smuzhiyun { 70*4882a593Smuzhiyun *(.__rel_dyn_end) 71*4882a593Smuzhiyun } 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun .hash : { *(.hash*) } 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun .end : 76*4882a593Smuzhiyun { 77*4882a593Smuzhiyun *(.__end) 78*4882a593Smuzhiyun } 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun _image_binary_end = .; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun/* 83*4882a593Smuzhiyun * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c 84*4882a593Smuzhiyun * __bss_base and __bss_limit are for linker only (overlay ordering) 85*4882a593Smuzhiyun */ 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun .bss_start __rel_dyn_start (OVERLAY) : { 88*4882a593Smuzhiyun KEEP(*(.__bss_start)); 89*4882a593Smuzhiyun __bss_base = .; 90*4882a593Smuzhiyun } 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun .bss __bss_base (OVERLAY) : { 93*4882a593Smuzhiyun *(.bss*) 94*4882a593Smuzhiyun . = ALIGN(4); 95*4882a593Smuzhiyun __bss_limit = .; 96*4882a593Smuzhiyun } 97*4882a593Smuzhiyun .bss_end __bss_limit (OVERLAY) : { 98*4882a593Smuzhiyun KEEP(*(.__bss_end)); 99*4882a593Smuzhiyun } 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun .dynsym _image_binary_end : { *(.dynsym) } 102*4882a593Smuzhiyun .dynbss : { *(.dynbss) } 103*4882a593Smuzhiyun .dynstr : { *(.dynstr*) } 104*4882a593Smuzhiyun .dynamic : { *(.dynamic*) } 105*4882a593Smuzhiyun .gnu.hash : { *(.gnu.hash) } 106*4882a593Smuzhiyun .plt : { *(.plt*) } 107*4882a593Smuzhiyun .interp : { *(.interp*) } 108*4882a593Smuzhiyun .gnu : { *(.gnu*) } 109*4882a593Smuzhiyun .ARM.exidx : { *(.ARM.exidx*) } 110*4882a593Smuzhiyun} 111